/**
 @file sys_usw_dmps_shared_api.c

 @author  Copyright (C) 2022 Centec Networks Inc.  All rights reserved.

 @date 2022-12-29

 @version v1.0

*/

/// TEMP COMMENT
/// mcmac_reg.c content :

/****************************************************************************
 *
* Header Files
*
****************************************************************************/
#include "drv_api.h"
#include "usw/include/drv_common.h"
#include "ctc_error.h"
#include "sys_usw_dmps_shared_api.h"
#include "sys_usw_mac.h"

int32
sys_usw_dmps_shared_reg_read_shared_pcs_lg_status(uint8 lchip, uint8 core_id, uint8 inst_id,
                                        uint8 fld_num, reg_field_info_t* fld_info);

int32
_sys_usw_dmps_shared_set_fec_rst(uint8 lchip, sys_dmps_mac_api_db_t* api_db, uint32 dir, uint32 reset)
{
    uint8  core_id     = 0;
    uint8  pcs_grp_idx = 0;
    uint8  fld_num     = 0;
    reg_field_info_t fld_info[4] = {{0}};
    uint32 fld_id = 0;

    fld_id = (DMPS_RX == dir) ? ResetCtlSharedFec_cfgSoftRstFecRx0_f : ResetCtlSharedFec_cfgSoftRstFecTx0_f;
    core_id     = api_db->core_id;
    pcs_grp_idx = api_db->pcs_grp_idx;

    fld_num = 0;
    
    if(CTC_CHIP_SERDES_LG_MODE == api_db->if_mode)
    {
        SET_REG_FIELD_INFO(fld_info, fld_num, api_db->pcs_idx,   fld_id, (reset ? 1 : 0));
        SET_REG_FIELD_INFO(fld_info, fld_num, api_db->pcs_idx+1, fld_id, (reset ? 1 : 0));
    }
    else if(CTC_CHIP_SERDES_CG_MODE  == api_db->if_mode ||
            CTC_CHIP_SERDES_XLG_MODE == api_db->if_mode)
    {
        SET_REG_FIELD_INFO(fld_info, fld_num, api_db->pcs_idx,   fld_id, (reset ? 1 : 0));
        SET_REG_FIELD_INFO(fld_info, fld_num, api_db->pcs_idx+1, fld_id, (reset ? 1 : 0));
        SET_REG_FIELD_INFO(fld_info, fld_num, api_db->pcs_idx+2, fld_id, (reset ? 1 : 0));
        SET_REG_FIELD_INFO(fld_info, fld_num, api_db->pcs_idx+3, fld_id, (reset ? 1 : 0));
    }
    /*xfi && xxvg*/
    else
    {
        SET_REG_FIELD_INFO(fld_info, fld_num, api_db->pcs_idx, fld_id, (reset ? 1 : 0));
    }
    
    CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_write_reset_ctl_shared_fec(lchip, core_id, pcs_grp_idx, fld_num, fld_info));

    return CTC_E_NONE;
}

int32
_sys_usw_dmps_shared_set_mac_tx_en(uint8 lchip, sys_dmps_mac_api_db_t* api_db, uint32 enable)
{
    uint8  core_id     = 0;
    uint8  mac_grp_idx = 0;
    uint8  pcs_grp_idx = 0;
    uint8  fld_num     = 0;
    uint32 fld_id      = 0;
    reg_field_info_t fld_info[1] = {{0}};

    core_id     = api_db->core_id;
    mac_grp_idx = api_db->mac_grp_idx;
    pcs_grp_idx = api_db->pcs_grp_idx;

    if (enable)  /* release reset */
    {
        if(CTC_CHIP_SERDES_LG_MODE == api_db->if_mode)
        {
            /* Release Pcs Tx Soft Reset */
            fld_num = 0;
            fld_id = (0 == api_db->pcs_idx) ? SharedPcsSoftRst_softRstXlgTx_f : SharedPcsSoftRst_softRstLgTx_f;
            SET_REG_FIELD_INFO(fld_info, fld_num, api_db->pcs_idx, fld_id, 0);
            CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_write_shared_pcs_soft_rst(lchip, core_id, pcs_grp_idx, fld_num, fld_info));

            /* Release Mii Tx Soft Reset */
            fld_num = 0;
            SET_REG_FIELD_INFO(fld_info, fld_num, api_db->mac_idx, SharedMiiResetCfg_cfgSoftRstTx0_f, 0);
            CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_write_shared_mii_reset_cfg(lchip, core_id, mac_grp_idx, fld_num, fld_info));
        }
        else if(CTC_CHIP_SERDES_XLG_MODE == api_db->if_mode)
        {
            /* Release Pcs Tx Soft Reset */
            fld_num = 0;
            fld_id = SharedPcsSoftRst_softRstXlgTx_f;
            SET_REG_FIELD_INFO(fld_info, fld_num, api_db->pcs_idx, fld_id, 0);
            CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_write_shared_pcs_soft_rst(lchip, core_id, pcs_grp_idx, fld_num, fld_info));

            /* Release Mii Tx Soft Reset */
            fld_num = 0;
            SET_REG_FIELD_INFO(fld_info, fld_num, api_db->mac_idx, SharedMiiResetCfg_cfgSoftRstTx0_f, 0);
            CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_write_shared_mii_reset_cfg(lchip, core_id, mac_grp_idx, fld_num, fld_info));
        }
        else if(CTC_CHIP_SERDES_CG_MODE == api_db->if_mode)
        {
            /* Release Pcs Tx Soft Reset */
            fld_num = 0;
            fld_id = SharedPcsSoftRst_softRstCgTx_f;
            SET_REG_FIELD_INFO(fld_info, fld_num, api_db->pcs_idx, fld_id, 0);
            CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_write_shared_pcs_soft_rst(lchip, core_id, pcs_grp_idx, fld_num, fld_info));

            /* Release Mii Tx Soft Reset */
            fld_num = 0;
            SET_REG_FIELD_INFO(fld_info, fld_num, api_db->mac_idx, SharedMiiResetCfg_cfgSoftRstTx0_f, 0);
            CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_write_shared_mii_reset_cfg(lchip, core_id, mac_grp_idx, fld_num, fld_info));
        }
        else
        {
            /* Release Pcs Tx Soft Reset */
            fld_num = 0;
            SET_REG_FIELD_INFO(fld_info, fld_num, api_db->pcs_idx, SharedPcsSoftRst_softRstPcsTx0_f, 0);
            CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_write_shared_pcs_soft_rst(lchip, core_id, pcs_grp_idx, fld_num, fld_info));

            /* Release Mii Tx Soft Reset */
            fld_num = 0;
            SET_REG_FIELD_INFO(fld_info, fld_num, api_db->mac_idx, SharedMiiResetCfg_cfgSoftRstTx0_f, 0);
            CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_write_shared_mii_reset_cfg(lchip, core_id, mac_grp_idx, fld_num, fld_info));
        }
    }
    else     /* Assert reset */
    {
        if(CTC_CHIP_SERDES_LG_MODE == api_db->if_mode)
        {
            /* Assert Mii Tx Soft Reset */
            fld_num = 0;
            SET_REG_FIELD_INFO(fld_info, fld_num, api_db->mac_idx, SharedMiiResetCfg_cfgSoftRstTx0_f, 1);
            CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_write_shared_mii_reset_cfg(lchip, core_id, mac_grp_idx, fld_num, fld_info));

            /* Assert Pcs Tx Soft Reset */
            fld_num = 0;
            fld_id = (0 == api_db->pcs_idx) ? SharedPcsSoftRst_softRstXlgTx_f : SharedPcsSoftRst_softRstLgTx_f;
            SET_REG_FIELD_INFO(fld_info, fld_num, api_db->pcs_idx, fld_id, 1);
            CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_write_shared_pcs_soft_rst(lchip, core_id, pcs_grp_idx, fld_num, fld_info));
        }
        else if(CTC_CHIP_SERDES_XLG_MODE == api_db->if_mode)
        {
            /* Assert Mii Tx Soft Reset */
            fld_num = 0;
            SET_REG_FIELD_INFO(fld_info, fld_num, api_db->mac_idx, SharedMiiResetCfg_cfgSoftRstTx0_f, 1);
            CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_write_shared_mii_reset_cfg(lchip, core_id, mac_grp_idx, fld_num, fld_info));

            /* Assert Pcs Tx Soft Reset */
            fld_num = 0;
            fld_id = SharedPcsSoftRst_softRstXlgTx_f;
            SET_REG_FIELD_INFO(fld_info, fld_num, api_db->pcs_idx, fld_id, 1);
            CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_write_shared_pcs_soft_rst(lchip, core_id, pcs_grp_idx, fld_num, fld_info));
        }
        else if(CTC_CHIP_SERDES_CG_MODE == api_db->if_mode)
        {
            /* Assert Mii Tx Soft Reset */
            fld_num = 0;
            SET_REG_FIELD_INFO(fld_info, fld_num, api_db->mac_idx, SharedMiiResetCfg_cfgSoftRstTx0_f, 1);
            CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_write_shared_mii_reset_cfg(lchip, core_id, mac_grp_idx, fld_num, fld_info));

            /* Assert Pcs Tx Soft Reset */
            fld_num = 0;
            fld_id = SharedPcsSoftRst_softRstCgTx_f;
            SET_REG_FIELD_INFO(fld_info, fld_num, api_db->pcs_idx, fld_id, 1);
            CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_write_shared_pcs_soft_rst(lchip, core_id, pcs_grp_idx, fld_num, fld_info));
        }
        else
        {
            /* Assert Mii Tx Soft Reset */
            fld_num = 0;
            SET_REG_FIELD_INFO(fld_info, fld_num, api_db->mac_idx, SharedMiiResetCfg_cfgSoftRstTx0_f, 1);
            CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_write_shared_mii_reset_cfg(lchip, core_id, mac_grp_idx, fld_num, fld_info));

            /* Assert Pcs Tx Soft Reset */
            fld_num = 0;
            SET_REG_FIELD_INFO(fld_info, fld_num, api_db->pcs_idx, SharedPcsSoftRst_softRstPcsTx0_f, 1);
            CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_write_shared_pcs_soft_rst(lchip, core_id, pcs_grp_idx, fld_num, fld_info));
        }
    }

    return CTC_E_NONE;
}

int32
_sys_usw_dmps_shared_set_mac_rx_en(uint8 lchip, sys_dmps_mac_api_db_t* api_db, uint32 enable)
{
    uint8  core_id     = 0;
    uint8  mac_grp_idx = 0;
    uint8  pcs_grp_idx = 0;
    uint8  fld_num     = 0;
    uint32 fld_id      = 0;
    reg_field_info_t fld_info[2] = {{0}};

    core_id     = api_db->core_id;
    mac_grp_idx = api_db->mac_grp_idx;
    pcs_grp_idx = api_db->pcs_grp_idx;

    if (enable)  /* release reset */
    {
        if(CTC_CHIP_SERDES_LG_MODE == api_db->if_mode)
        {
            /* Release Mii Rx Soft Reset */
            fld_num = 0;
            SET_REG_FIELD_INFO(fld_info, fld_num, api_db->mac_idx, SharedMiiResetCfg_cfgSoftRstRx0_f, 0);
            CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_write_shared_mii_reset_cfg(lchip, core_id, mac_grp_idx, fld_num, fld_info));

            /* Release Pcs Rx Soft Reset */
            fld_num = 0;
            fld_id = (0 == api_db->pcs_idx) ? SharedPcsSoftRst_softRstXlgRx_f : SharedPcsSoftRst_softRstLgRx_f;
            SET_REG_FIELD_INFO(fld_info, fld_num, api_db->pcs_idx, fld_id, 0);
            fld_id = (0 == api_db->pcs_idx) ? SharedPcsSoftRst_rxDeskewSoftRst_f : SharedPcsSoftRst_rxDeskewSoftRstLg_f;
            SET_REG_FIELD_INFO(fld_info, fld_num, api_db->pcs_idx, fld_id, 0);
            CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_write_shared_pcs_soft_rst(lchip, core_id, pcs_grp_idx, fld_num, fld_info));
        }
        else if(CTC_CHIP_SERDES_XLG_MODE == api_db->if_mode)
        {
            /* Release Mii Rx Soft Reset */
            fld_num = 0;
            SET_REG_FIELD_INFO(fld_info, fld_num, api_db->mac_idx, SharedMiiResetCfg_cfgSoftRstRx0_f, 0);
            CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_write_shared_mii_reset_cfg(lchip, core_id, mac_grp_idx, fld_num, fld_info));

            /* Release Pcs Rx Soft Reset */
            fld_num = 0;
            fld_id = SharedPcsSoftRst_softRstXlgRx_f;
            SET_REG_FIELD_INFO(fld_info, fld_num, api_db->pcs_idx, fld_id, 0);
            fld_id = SharedPcsSoftRst_rxDeskewSoftRst_f;
            SET_REG_FIELD_INFO(fld_info, fld_num, api_db->pcs_idx, fld_id, 0);
            CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_write_shared_pcs_soft_rst(lchip, core_id, pcs_grp_idx, fld_num, fld_info));
        }
        else if(CTC_CHIP_SERDES_CG_MODE == api_db->if_mode)
        {
            /* Release Mii Rx Soft Reset */
            fld_num = 0;
            SET_REG_FIELD_INFO(fld_info, fld_num, api_db->mac_idx, SharedMiiResetCfg_cfgSoftRstRx0_f, 0);
            CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_write_shared_mii_reset_cfg(lchip, core_id, mac_grp_idx, fld_num, fld_info));

            /* Release Pcs Rx Soft Reset */
            fld_num = 0;
            fld_id = SharedPcsSoftRst_softRstCgRx_f;
            SET_REG_FIELD_INFO(fld_info, fld_num, api_db->pcs_idx, fld_id, 0);
            fld_id = SharedPcsSoftRst_rxDeskewSoftRst_f;
            SET_REG_FIELD_INFO(fld_info, fld_num, api_db->pcs_idx, fld_id, 0);
            CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_write_shared_pcs_soft_rst(lchip, core_id, pcs_grp_idx, fld_num, fld_info));
        }
        else
        {
            /* Release Mii Rx Soft Reset */
            fld_num = 0;
            SET_REG_FIELD_INFO(fld_info, fld_num, api_db->mac_idx, SharedMiiResetCfg_cfgSoftRstRx0_f, 0);
            CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_write_shared_mii_reset_cfg(lchip, core_id, mac_grp_idx, fld_num, fld_info));

            /* Release Pcs Rx Soft Reset */
            fld_num = 0;
            SET_REG_FIELD_INFO(fld_info, fld_num, api_db->pcs_idx, SharedPcsSoftRst_softRstPcsRx0_f, 0);
            CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_write_shared_pcs_soft_rst(lchip, core_id, pcs_grp_idx, fld_num, fld_info));
        }
    }
    else     /* Assert reset */
    {
        if(CTC_CHIP_SERDES_LG_MODE == api_db->if_mode)
        {
            /* Assert Pcs Rx Soft Reset */
            fld_num = 0;
            fld_id = (0 == api_db->pcs_idx) ? SharedPcsSoftRst_softRstXlgRx_f : SharedPcsSoftRst_softRstLgRx_f;
            SET_REG_FIELD_INFO(fld_info, fld_num, api_db->pcs_idx, fld_id, 1);
            fld_id = (0 == api_db->pcs_idx) ? SharedPcsSoftRst_rxDeskewSoftRst_f : SharedPcsSoftRst_rxDeskewSoftRstLg_f;
            SET_REG_FIELD_INFO(fld_info, fld_num, api_db->pcs_idx, fld_id, 1);
            CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_write_shared_pcs_soft_rst(lchip, core_id, pcs_grp_idx, fld_num, fld_info));

            /* Assert Mii Rx Soft Reset */
            fld_num = 0;
            SET_REG_FIELD_INFO(fld_info, fld_num, api_db->mac_idx, SharedMiiResetCfg_cfgSoftRstRx0_f, 1);
            CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_write_shared_mii_reset_cfg(lchip, core_id, mac_grp_idx, fld_num, fld_info));
        }
        else if(CTC_CHIP_SERDES_XLG_MODE == api_db->if_mode)
        {
            /* Assert Pcs Rx Soft Reset */
            fld_num = 0;
            fld_id = SharedPcsSoftRst_softRstXlgRx_f;
            SET_REG_FIELD_INFO(fld_info, fld_num, api_db->pcs_idx, fld_id, 1);
            fld_id = SharedPcsSoftRst_rxDeskewSoftRst_f;
            SET_REG_FIELD_INFO(fld_info, fld_num, api_db->pcs_idx, fld_id, 1);
            CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_write_shared_pcs_soft_rst(lchip, core_id, pcs_grp_idx, fld_num, fld_info));

            /* Assert Mii Rx Soft Reset */
            fld_num = 0;
            SET_REG_FIELD_INFO(fld_info, fld_num, api_db->mac_idx, SharedMiiResetCfg_cfgSoftRstRx0_f, 1);
            CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_write_shared_mii_reset_cfg(lchip, core_id, mac_grp_idx, fld_num, fld_info));
        }
        else if(CTC_CHIP_SERDES_CG_MODE == api_db->if_mode)
        {
            /* Assert Pcs Rx Soft Reset */
            fld_num = 0;
            fld_id = SharedPcsSoftRst_softRstCgRx_f;
            SET_REG_FIELD_INFO(fld_info, fld_num, api_db->pcs_idx, fld_id, 1);
            fld_id = SharedPcsSoftRst_rxDeskewSoftRst_f;
            SET_REG_FIELD_INFO(fld_info, fld_num, api_db->pcs_idx, fld_id, 1);
            CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_write_shared_pcs_soft_rst(lchip, core_id, pcs_grp_idx, fld_num, fld_info));

            /* Assert Mii Rx Soft Reset */
            fld_num = 0;
            SET_REG_FIELD_INFO(fld_info, fld_num, api_db->mac_idx, SharedMiiResetCfg_cfgSoftRstRx0_f, 1);
            CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_write_shared_mii_reset_cfg(lchip, core_id, mac_grp_idx, fld_num, fld_info));
        }
        else
        {
            /* Assert Pcs Rx Soft Reset */
            fld_num = 0;
            SET_REG_FIELD_INFO(fld_info, fld_num, api_db->pcs_idx, SharedPcsSoftRst_softRstPcsRx0_f, 1);
            CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_write_shared_pcs_soft_rst(lchip, core_id, pcs_grp_idx, fld_num, fld_info));

            /* Assert Mii Rx Soft Reset */
            fld_num = 0;
            SET_REG_FIELD_INFO(fld_info, fld_num, api_db->mac_idx, SharedMiiResetCfg_cfgSoftRstRx0_f, 1);
            CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_write_shared_mii_reset_cfg(lchip, core_id, mac_grp_idx, fld_num, fld_info));
        }
    }

    return CTC_E_NONE;
}

int32
_sys_usw_dmps_shared_set_fec_xfi(uint8 lchip, sys_dmps_mac_api_db_t* api_db)
{
    uint8  core_id     = 0;
    uint8  pcs_grp_idx = 0;
    uint8  fld_num     = 0;
    reg_field_info_t fld_info[1] = {{0}};

    core_id     = api_db->core_id;
    pcs_grp_idx = api_db->pcs_grp_idx;

    if (SYS_DMPS_FEC_TYPE_FC2112 == api_db->fec_type)
    {
        fld_num = 0;
        SET_REG_FIELD_INFO(fld_info, fld_num, api_db->pcs_idx, SharedPcsFecCfg_xfiPcsFecEn0_f, 1);
        CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_write_shared_pcs_fec_cfg(lchip, core_id, pcs_grp_idx, fld_num, fld_info));

        fld_num = 0;
        SET_REG_FIELD_INFO(fld_info, fld_num, api_db->pcs_idx, GlobalCtlSharedFec_cfgSharedFecRxAmInterval0_f, 0x3fff);
        CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_write_global_ctl_shared_fec(lchip, core_id, pcs_grp_idx, fld_num, fld_info));

        fld_num = 0;
        SET_REG_FIELD_INFO(fld_info, fld_num, api_db->pcs_idx, XgFec0CtlSharedFec_cfgXgFec0TxWidth_f, 0);
        CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_write_xg_fec_ctl_shared_fec(lchip, core_id, pcs_grp_idx, 2*(api_db->pcs_idx), fld_num, fld_info));
    }
    else if (SYS_DMPS_FEC_TYPE_NONE == api_db->fec_type)
    {
        fld_num = 0;
        SET_REG_FIELD_INFO(fld_info, fld_num, api_db->pcs_idx, SharedPcsFecCfg_xfiPcsFecEn0_f, 0);
        CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_write_shared_pcs_fec_cfg(lchip, core_id, pcs_grp_idx, fld_num, fld_info));

        fld_num = 0;
        SET_REG_FIELD_INFO(fld_info, fld_num, api_db->pcs_idx, GlobalCtlSharedFec_cfgSharedFecRxAmInterval0_f, 0x3fff);
        CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_write_global_ctl_shared_fec(lchip, core_id, pcs_grp_idx, fld_num, fld_info));

        fld_num = 0;
        SET_REG_FIELD_INFO(fld_info, fld_num, api_db->pcs_idx, XgFec0CtlSharedFec_cfgXgFec0TxWidth_f, 1);
        CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_write_xg_fec_ctl_shared_fec(lchip, core_id, pcs_grp_idx, 2*(api_db->pcs_idx), fld_num, fld_info));
    }

    return CTC_E_NONE;
}

int32
_sys_usw_dmps_shared_set_fec_xxvg(uint8 lchip, sys_dmps_mac_api_db_t* api_db)
{
    uint8  core_id     = 0;
    uint8  mac_grp_idx = 0;
    uint8  pcs_grp_idx = 0;
    uint8  fld_num     = 0;
    reg_field_info_t fld_info[2] = {{0}};

    core_id     = api_db->core_id;
    mac_grp_idx = api_db->mac_grp_idx;
    pcs_grp_idx = api_db->pcs_grp_idx;

    if (SYS_DMPS_FEC_TYPE_FC2112 == api_db->fec_type)
    {
        fld_num = 0;
        SET_REG_FIELD_INFO(fld_info, fld_num, api_db->pcs_idx, SharedPcsFecCfg_xfiPcsFecEn0_f, 1);
        CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_write_shared_pcs_fec_cfg(lchip, core_id, pcs_grp_idx, fld_num, fld_info));

        fld_num = 0;
        SET_REG_FIELD_INFO(fld_info, fld_num, api_db->pcs_idx, GlobalCtlSharedFec_cfgSharedFecRxAmInterval0_f,  0x3fff);
        SET_REG_FIELD_INFO(fld_info, fld_num, api_db->pcs_idx, GlobalCtlSharedFec_cfgSharedFec25GPort0RsMode_f, 0);
        CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_write_global_ctl_shared_fec(lchip, core_id, pcs_grp_idx, fld_num, fld_info));

        fld_num = 0;
        SET_REG_FIELD_INFO(fld_info, fld_num, 0, SharedMii0Cfg_cfgMiiTxRsFecEn0_f,    0);
        SET_REG_FIELD_INFO(fld_info, fld_num, 0, SharedMii0Cfg_cfgMiiTxAmInterval0_f, 0x3fff);
        CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_write_sharedmii0cfg(lchip, core_id, mac_grp_idx, api_db->mac_idx, fld_num, fld_info));

        fld_num = 0;
        SET_REG_FIELD_INFO(fld_info, fld_num, api_db->pcs_idx, XgFec0CtlSharedFec_cfgXgFec0TxWidth_f, 1);
        CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_write_xg_fec_ctl_shared_fec(lchip, core_id, pcs_grp_idx, 2*(api_db->pcs_idx), fld_num, fld_info));
    }
    else if (SYS_DMPS_FEC_TYPE_RS528 == api_db->fec_type)
    {
        fld_num = 0;
        SET_REG_FIELD_INFO(fld_info, fld_num, api_db->pcs_idx, SharedPcsFecCfg_xfiPcsFecEn0_f, 1);
        CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_write_shared_pcs_fec_cfg(lchip, core_id, pcs_grp_idx, fld_num, fld_info));

        fld_num = 0;
#ifdef TMG_SERDES_SIM           
        SET_REG_FIELD_INFO(fld_info, fld_num, api_db->pcs_idx, GlobalCtlSharedFec_cfgSharedFecRxAmInterval0_f,  319);
#else
        SET_REG_FIELD_INFO(fld_info, fld_num, api_db->pcs_idx, GlobalCtlSharedFec_cfgSharedFecRxAmInterval0_f,  0x13fff);
#endif
        SET_REG_FIELD_INFO(fld_info, fld_num, api_db->pcs_idx, GlobalCtlSharedFec_cfgSharedFec25GPort0RsMode_f, 1);
        CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_write_global_ctl_shared_fec(lchip, core_id, pcs_grp_idx, fld_num, fld_info));

        fld_num = 0;
        SET_REG_FIELD_INFO(fld_info, fld_num, 0, SharedMii0Cfg_cfgMiiTxRsFecEn0_f,    1);
#ifdef TMG_SERDES_SIM        
        SET_REG_FIELD_INFO(fld_info, fld_num, 0, SharedMii0Cfg_cfgMiiTxAmInterval0_f, 79);
#else
        SET_REG_FIELD_INFO(fld_info, fld_num, 0, SharedMii0Cfg_cfgMiiTxAmInterval0_f, 0x4fff);
#endif
        CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_write_sharedmii0cfg(lchip, core_id, mac_grp_idx, api_db->mac_idx, fld_num, fld_info));

        fld_num = 0;
        SET_REG_FIELD_INFO(fld_info, fld_num, api_db->pcs_idx, XgFec0CtlSharedFec_cfgXgFec0TxWidth_f, 1);
        CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_write_xg_fec_ctl_shared_fec(lchip, core_id, pcs_grp_idx, 2*(api_db->pcs_idx), fld_num, fld_info));
    }
    else if (SYS_DMPS_FEC_TYPE_NONE == api_db->fec_type)
    {
        fld_num = 0;
        SET_REG_FIELD_INFO(fld_info, fld_num, api_db->pcs_idx, SharedPcsFecCfg_xfiPcsFecEn0_f, 0);
        CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_write_shared_pcs_fec_cfg(lchip, core_id, pcs_grp_idx, fld_num, fld_info));

        fld_num = 0;
        SET_REG_FIELD_INFO(fld_info, fld_num, api_db->pcs_idx, GlobalCtlSharedFec_cfgSharedFecRxAmInterval0_f,  0x3fff);
        SET_REG_FIELD_INFO(fld_info, fld_num, api_db->pcs_idx, GlobalCtlSharedFec_cfgSharedFec25GPort0RsMode_f, 0);
        CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_write_global_ctl_shared_fec(lchip, core_id, pcs_grp_idx, fld_num, fld_info));

        fld_num = 0;
        SET_REG_FIELD_INFO(fld_info, fld_num, 0, SharedMii0Cfg_cfgMiiTxRsFecEn0_f,    0);
        SET_REG_FIELD_INFO(fld_info, fld_num, 0, SharedMii0Cfg_cfgMiiTxAmInterval0_f, 0x3fff);
        CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_write_sharedmii0cfg(lchip, core_id, mac_grp_idx, api_db->mac_idx, fld_num, fld_info));

        fld_num = 0;
        SET_REG_FIELD_INFO(fld_info, fld_num, api_db->pcs_idx, XgFec0CtlSharedFec_cfgXgFec0TxWidth_f, 1);
        CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_write_xg_fec_ctl_shared_fec(lchip, core_id, pcs_grp_idx, 2*(api_db->pcs_idx), fld_num, fld_info));
    }

    return CTC_E_NONE;
}

int32
_sys_usw_dmps_shared_set_fec_xlg(uint8 lchip, sys_dmps_mac_api_db_t* api_db)
{
    uint8  core_id     = 0;
#ifdef TMG_SERDES_SIM
    uint8  mac_grp_idx = 0;
#endif
    uint8  pcs_grp_idx = 0;
    uint8  fld_num     = 0;
    reg_field_info_t fld_info[5] = {{0}};

    core_id     = api_db->core_id;
    pcs_grp_idx = api_db->pcs_grp_idx;
#ifdef TMG_SERDES_SIM
    mac_grp_idx = api_db->mac_grp_idx;
#endif

    if (SYS_DMPS_FEC_TYPE_FC2112 == api_db->fec_type)
    {
        fld_num = 0;
        SET_REG_FIELD_INFO(fld_info, fld_num, 0, SharedPcsFecCfg_xlgPcsFecEn_f, 1);
        CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_write_shared_pcs_fec_cfg(lchip, core_id, pcs_grp_idx, fld_num, fld_info));

        fld_num = 0;
        SET_REG_FIELD_INFO(fld_info, fld_num, 0, GlobalCtlSharedFec_cfgSharedFecRxAmInterval0_f, 0x3fff);
        SET_REG_FIELD_INFO(fld_info, fld_num, 1, GlobalCtlSharedFec_cfgSharedFecRxAmInterval0_f, 0x3fff);
        SET_REG_FIELD_INFO(fld_info, fld_num, 2, GlobalCtlSharedFec_cfgSharedFecRxAmInterval0_f, 0x3fff);
        SET_REG_FIELD_INFO(fld_info, fld_num, 3, GlobalCtlSharedFec_cfgSharedFecRxAmInterval0_f, 0x3fff);
        SET_REG_FIELD_INFO(fld_info, fld_num, 0, GlobalCtlSharedFec_cfgSharedFec40GPort_f,       1);
        CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_write_global_ctl_shared_fec(lchip, core_id, pcs_grp_idx, fld_num, fld_info));

        fld_num = 0;
        SET_REG_FIELD_INFO(fld_info, fld_num, api_db->pcs_idx, XgFec0CtlSharedFec_cfgXgFec0TxWidth_f, 0);
        CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_write_xg_fec_ctl_shared_fec(lchip, core_id, pcs_grp_idx, 0, fld_num, fld_info));
        CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_write_xg_fec_ctl_shared_fec(lchip, core_id, pcs_grp_idx, 2, fld_num, fld_info));
        CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_write_xg_fec_ctl_shared_fec(lchip, core_id, pcs_grp_idx, 4, fld_num, fld_info));
        CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_write_xg_fec_ctl_shared_fec(lchip, core_id, pcs_grp_idx, 6, fld_num, fld_info));
    }
    else if (SYS_DMPS_FEC_TYPE_NONE == api_db->fec_type)
    {
        fld_num = 0;
        SET_REG_FIELD_INFO(fld_info, fld_num, 0, SharedPcsFecCfg_xlgPcsFecEn_f, 0);
        CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_write_shared_pcs_fec_cfg(lchip, core_id, pcs_grp_idx, fld_num, fld_info));

        fld_num = 0;
   
        SET_REG_FIELD_INFO(fld_info, fld_num, 0, GlobalCtlSharedFec_cfgSharedFecRxAmInterval0_f, 0x3fff);
        SET_REG_FIELD_INFO(fld_info, fld_num, 1, GlobalCtlSharedFec_cfgSharedFecRxAmInterval0_f, 0x3fff);
        SET_REG_FIELD_INFO(fld_info, fld_num, 2, GlobalCtlSharedFec_cfgSharedFecRxAmInterval0_f, 0x3fff);
        SET_REG_FIELD_INFO(fld_info, fld_num, 3, GlobalCtlSharedFec_cfgSharedFecRxAmInterval0_f, 0x3fff);
        SET_REG_FIELD_INFO(fld_info, fld_num, 0, GlobalCtlSharedFec_cfgSharedFec40GPort_f,       0);
        CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_write_global_ctl_shared_fec(lchip, core_id, pcs_grp_idx, fld_num, fld_info));

        fld_num = 0;
        SET_REG_FIELD_INFO(fld_info, fld_num, api_db->pcs_idx, XgFec0CtlSharedFec_cfgXgFec0TxWidth_f, 1);
        CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_write_xg_fec_ctl_shared_fec(lchip, core_id, pcs_grp_idx, 0, fld_num, fld_info));
        CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_write_xg_fec_ctl_shared_fec(lchip, core_id, pcs_grp_idx, 2, fld_num, fld_info));
        CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_write_xg_fec_ctl_shared_fec(lchip, core_id, pcs_grp_idx, 4, fld_num, fld_info));
        CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_write_xg_fec_ctl_shared_fec(lchip, core_id, pcs_grp_idx, 6, fld_num, fld_info));
     
    }

#ifdef TMG_SERDES_SIM
        fld_num = 0;
        SET_REG_FIELD_INFO(fld_info, fld_num, 0, SharedMii0Cfg_cfgMiiTxAmInterval0_f, 255);
        CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_write_sharedmii0cfg(lchip, core_id, mac_grp_idx, api_db->mac_idx, fld_num, fld_info));

        fld_num = 0;
        SET_REG_FIELD_INFO(fld_info, fld_num, 0, SharedPcsXlgCfg_rxAmInterval_f, 255);
        CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_write_shared_pcs_xlg_cfg(lchip, core_id, pcs_grp_idx, 0, fld_num, fld_info));
#endif


    return CTC_E_NONE;
}

int32
_sys_usw_dmps_shared_set_fec_lg(uint8 lchip, sys_dmps_mac_api_db_t* api_db)
{
    uint8  core_id     = 0;
    uint8  mac_grp_idx = 0;
    uint8  pcs_grp_idx = 0;
    uint8  fld_num     = 0;
    reg_field_info_t fld_info[5] = {{0}};

    core_id     = api_db->core_id;
    mac_grp_idx = api_db->mac_grp_idx;
    pcs_grp_idx = api_db->pcs_grp_idx;

    if (SYS_DMPS_FEC_TYPE_FC2112 == api_db->fec_type)
    {
        fld_num = 0;
        SET_REG_FIELD_INFO(fld_info, fld_num, api_db->pcs_idx, SharedPcsFecCfg_lgPcsFecEn0_f,     1);
        SET_REG_FIELD_INFO(fld_info, fld_num, api_db->pcs_idx, SharedPcsFecCfg_lgPcsFecRsMode0_f, 0);
        CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_write_shared_pcs_fec_cfg(lchip, core_id, pcs_grp_idx, fld_num, fld_info));

        fld_num = 0;
        SET_REG_FIELD_INFO(fld_info, fld_num, api_db->pcs_idx,     GlobalCtlSharedFec_cfgSharedFecRxAmInterval0_f,  0x3fff);
        SET_REG_FIELD_INFO(fld_info, fld_num, api_db->pcs_idx + 1, GlobalCtlSharedFec_cfgSharedFecRxAmInterval0_f,  0x3fff);
        SET_REG_FIELD_INFO(fld_info, fld_num, api_db->pcs_idx,     GlobalCtlSharedFec_cfgSharedFec50GPort0_f,       1);
        SET_REG_FIELD_INFO(fld_info, fld_num, api_db->pcs_idx,     GlobalCtlSharedFec_cfgSharedFec50GPort0RsMode_f, 0);
        CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_write_global_ctl_shared_fec(lchip, core_id, pcs_grp_idx, fld_num, fld_info));

        fld_num = 0;
        SET_REG_FIELD_INFO(fld_info, fld_num, 0, SharedMii0Cfg_cfgMiiTxRsFecEn0_f,    0);
#ifdef TMG_SERDES_SIM
        SET_REG_FIELD_INFO(fld_info, fld_num, 0, SharedMii0Cfg_cfgMiiTxAmInterval0_f, 79);
#else 
        SET_REG_FIELD_INFO(fld_info, fld_num, 0, SharedMii0Cfg_cfgMiiTxAmInterval0_f, 0x3fff);
#endif
        CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_write_sharedmii0cfg(lchip, core_id, mac_grp_idx, api_db->mac_idx, fld_num, fld_info));

        fld_num = 0;
        SET_REG_FIELD_INFO(fld_info, fld_num, api_db->pcs_idx, XgFec0CtlSharedFec_cfgXgFec0TxWidth_f, 0);
        if(0 == api_db->pcs_idx)
        {
            CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_write_xg_fec_ctl_shared_fec(lchip, core_id, pcs_grp_idx, 0, fld_num, fld_info));
            CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_write_xg_fec_ctl_shared_fec(lchip, core_id, pcs_grp_idx, 1, fld_num, fld_info));
            CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_write_xg_fec_ctl_shared_fec(lchip, core_id, pcs_grp_idx, 2, fld_num, fld_info));
            CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_write_xg_fec_ctl_shared_fec(lchip, core_id, pcs_grp_idx, 3, fld_num, fld_info));
        }
        else
        {
            CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_write_xg_fec_ctl_shared_fec(lchip, core_id, pcs_grp_idx, 4, fld_num, fld_info));
            CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_write_xg_fec_ctl_shared_fec(lchip, core_id, pcs_grp_idx, 5, fld_num, fld_info));
            CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_write_xg_fec_ctl_shared_fec(lchip, core_id, pcs_grp_idx, 6, fld_num, fld_info));
            CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_write_xg_fec_ctl_shared_fec(lchip, core_id, pcs_grp_idx, 7, fld_num, fld_info));
        }
#ifdef TMG_SERDES_SIM
        fld_num = 0;
        SET_REG_FIELD_INFO(fld_info, fld_num, 0, SharedPcsXlgCfg_rxAmInterval_f, 79);
        CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_write_shared_pcs_xlg_cfg(lchip, core_id, pcs_grp_idx, 0, fld_num, fld_info));
#endif
    }
    if (SYS_DMPS_FEC_TYPE_RS528 == api_db->fec_type)
    {
        fld_num = 0;
        SET_REG_FIELD_INFO(fld_info, fld_num, api_db->pcs_idx, SharedPcsFecCfg_lgPcsFecEn0_f,     1);
        SET_REG_FIELD_INFO(fld_info, fld_num, api_db->pcs_idx, SharedPcsFecCfg_lgPcsFecRsMode0_f, 1);
        CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_write_shared_pcs_fec_cfg(lchip, core_id, pcs_grp_idx, fld_num, fld_info));

        fld_num = 0;
#ifdef TMG_SERDES_SIM       
        SET_REG_FIELD_INFO(fld_info, fld_num, api_db->pcs_idx,     GlobalCtlSharedFec_cfgSharedFecRxAmInterval0_f,  639);
        SET_REG_FIELD_INFO(fld_info, fld_num, api_db->pcs_idx + 1, GlobalCtlSharedFec_cfgSharedFecRxAmInterval0_f,  639);
#else
        SET_REG_FIELD_INFO(fld_info, fld_num, api_db->pcs_idx,     GlobalCtlSharedFec_cfgSharedFecRxAmInterval0_f,  0x9fff);
        SET_REG_FIELD_INFO(fld_info, fld_num, api_db->pcs_idx + 1, GlobalCtlSharedFec_cfgSharedFecRxAmInterval0_f,  0x9fff);
#endif
        SET_REG_FIELD_INFO(fld_info, fld_num, api_db->pcs_idx,     GlobalCtlSharedFec_cfgSharedFec50GPort0_f,       1);
        SET_REG_FIELD_INFO(fld_info, fld_num, api_db->pcs_idx,     GlobalCtlSharedFec_cfgSharedFec50GPort0RsMode_f, 1);
        CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_write_global_ctl_shared_fec(lchip, core_id, pcs_grp_idx, fld_num, fld_info));

        fld_num = 0;
        SET_REG_FIELD_INFO(fld_info, fld_num, 0, SharedMii0Cfg_cfgMiiTxRsFecEn0_f,    1);
#ifdef TMG_SERDES_SIM       
        SET_REG_FIELD_INFO(fld_info, fld_num, 0, SharedMii0Cfg_cfgMiiTxAmInterval0_f, 319);
#else
        SET_REG_FIELD_INFO(fld_info, fld_num, 0, SharedMii0Cfg_cfgMiiTxAmInterval0_f, 0x4fff);
#endif
        CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_write_sharedmii0cfg(lchip, core_id, mac_grp_idx, api_db->mac_idx, fld_num, fld_info));

        fld_num = 0;
        SET_REG_FIELD_INFO(fld_info, fld_num, api_db->pcs_idx, XgFec0CtlSharedFec_cfgXgFec0TxWidth_f, 1);
        if(0 == api_db->pcs_idx)
        {
            CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_write_xg_fec_ctl_shared_fec(lchip, core_id, pcs_grp_idx, 0, fld_num, fld_info));
            CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_write_xg_fec_ctl_shared_fec(lchip, core_id, pcs_grp_idx, 1, fld_num, fld_info));
            CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_write_xg_fec_ctl_shared_fec(lchip, core_id, pcs_grp_idx, 2, fld_num, fld_info));
            CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_write_xg_fec_ctl_shared_fec(lchip, core_id, pcs_grp_idx, 3, fld_num, fld_info));
        }
        else
        {
            CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_write_xg_fec_ctl_shared_fec(lchip, core_id, pcs_grp_idx, 4, fld_num, fld_info));
            CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_write_xg_fec_ctl_shared_fec(lchip, core_id, pcs_grp_idx, 5, fld_num, fld_info));
            CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_write_xg_fec_ctl_shared_fec(lchip, core_id, pcs_grp_idx, 6, fld_num, fld_info));
            CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_write_xg_fec_ctl_shared_fec(lchip, core_id, pcs_grp_idx, 7, fld_num, fld_info));
        }
    }
    else if (SYS_DMPS_FEC_TYPE_NONE == api_db->fec_type)
    {
        fld_num = 0;
        SET_REG_FIELD_INFO(fld_info, fld_num, api_db->pcs_idx, SharedPcsFecCfg_lgPcsFecEn0_f,     0);
        SET_REG_FIELD_INFO(fld_info, fld_num, api_db->pcs_idx, SharedPcsFecCfg_lgPcsFecRsMode0_f, 0);
        CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_write_shared_pcs_fec_cfg(lchip, core_id, pcs_grp_idx, fld_num, fld_info));

        fld_num = 0;
        SET_REG_FIELD_INFO(fld_info, fld_num, api_db->pcs_idx,     GlobalCtlSharedFec_cfgSharedFecRxAmInterval0_f,  0x3fff);
        SET_REG_FIELD_INFO(fld_info, fld_num, api_db->pcs_idx + 1, GlobalCtlSharedFec_cfgSharedFecRxAmInterval0_f,  0x3fff);
        SET_REG_FIELD_INFO(fld_info, fld_num, api_db->pcs_idx,     GlobalCtlSharedFec_cfgSharedFec50GPort0_f,       0);
        SET_REG_FIELD_INFO(fld_info, fld_num, api_db->pcs_idx,     GlobalCtlSharedFec_cfgSharedFec50GPort0RsMode_f, 0);
        CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_write_global_ctl_shared_fec(lchip, core_id, pcs_grp_idx, fld_num, fld_info));

        fld_num = 0;
        SET_REG_FIELD_INFO(fld_info, fld_num, 0, SharedMii0Cfg_cfgMiiTxRsFecEn0_f,    0);
#ifdef TMG_SERDES_SIM             
        SET_REG_FIELD_INFO(fld_info, fld_num, 0, SharedMii0Cfg_cfgMiiTxAmInterval0_f, 255);
#else
        SET_REG_FIELD_INFO(fld_info, fld_num, 0, SharedMii0Cfg_cfgMiiTxAmInterval0_f, 0x3fff);
#endif
        CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_write_sharedmii0cfg(lchip, core_id, mac_grp_idx, api_db->mac_idx, fld_num, fld_info));

        fld_num = 0;
        SET_REG_FIELD_INFO(fld_info, fld_num, api_db->pcs_idx, XgFec0CtlSharedFec_cfgXgFec0TxWidth_f, 1);
        if(0 == api_db->pcs_idx)
        {
            CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_write_xg_fec_ctl_shared_fec(lchip, core_id, pcs_grp_idx, 0, fld_num, fld_info));
            CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_write_xg_fec_ctl_shared_fec(lchip, core_id, pcs_grp_idx, 1, fld_num, fld_info));
            CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_write_xg_fec_ctl_shared_fec(lchip, core_id, pcs_grp_idx, 2, fld_num, fld_info));
            CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_write_xg_fec_ctl_shared_fec(lchip, core_id, pcs_grp_idx, 3, fld_num, fld_info));
        }
        else
        {
            CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_write_xg_fec_ctl_shared_fec(lchip, core_id, pcs_grp_idx, 4, fld_num, fld_info));
            CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_write_xg_fec_ctl_shared_fec(lchip, core_id, pcs_grp_idx, 5, fld_num, fld_info));
            CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_write_xg_fec_ctl_shared_fec(lchip, core_id, pcs_grp_idx, 6, fld_num, fld_info));
            CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_write_xg_fec_ctl_shared_fec(lchip, core_id, pcs_grp_idx, 7, fld_num, fld_info));
        }

#ifdef TMG_SERDES_SIM
        fld_num = 0;
        SET_REG_FIELD_INFO(fld_info, fld_num, 0, SharedPcsXlgCfg_rxAmInterval_f, 255);
        CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_write_shared_pcs_xlg_cfg(lchip, core_id, pcs_grp_idx, 0, fld_num, fld_info));
#endif
    }

    return CTC_E_NONE;
}

int32
_sys_usw_dmps_shared_set_fec_cg(uint8 lchip, sys_dmps_mac_api_db_t* api_db)
{
    uint8  core_id     = 0;
    uint8  mac_grp_idx = 0;
    uint8  pcs_grp_idx = 0;
    uint8  fld_num     = 0;
    reg_field_info_t fld_info[5] = {{0}};

    core_id     = api_db->core_id;
    mac_grp_idx = api_db->mac_grp_idx;
    pcs_grp_idx = api_db->pcs_grp_idx;

    if (SYS_DMPS_FEC_TYPE_RS528 == api_db->fec_type)
    {
        fld_num = 0;
        SET_REG_FIELD_INFO(fld_info, fld_num, 0, SharedPcsFecCfg_cgfecEn_f, 1);
        CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_write_shared_pcs_fec_cfg(lchip, core_id, pcs_grp_idx, fld_num, fld_info));

        fld_num = 0;
#ifdef TMG_SERDES_SIM        
        SET_REG_FIELD_INFO(fld_info, fld_num, 0, GlobalCtlSharedFec_cfgSharedFecRxAmInterval0_f, 1599);
        SET_REG_FIELD_INFO(fld_info, fld_num, 1, GlobalCtlSharedFec_cfgSharedFecRxAmInterval0_f, 1599);
        SET_REG_FIELD_INFO(fld_info, fld_num, 2, GlobalCtlSharedFec_cfgSharedFecRxAmInterval0_f, 1599);
        SET_REG_FIELD_INFO(fld_info, fld_num, 3, GlobalCtlSharedFec_cfgSharedFecRxAmInterval0_f, 1599);
#else
        SET_REG_FIELD_INFO(fld_info, fld_num, 0, GlobalCtlSharedFec_cfgSharedFecRxAmInterval0_f, 0x13fff);
        SET_REG_FIELD_INFO(fld_info, fld_num, 1, GlobalCtlSharedFec_cfgSharedFecRxAmInterval0_f, 0x13fff);
        SET_REG_FIELD_INFO(fld_info, fld_num, 2, GlobalCtlSharedFec_cfgSharedFecRxAmInterval0_f, 0x13fff);
        SET_REG_FIELD_INFO(fld_info, fld_num, 3, GlobalCtlSharedFec_cfgSharedFecRxAmInterval0_f, 0x13fff);
#endif
        SET_REG_FIELD_INFO(fld_info, fld_num, 4, GlobalCtlSharedFec_cfgSharedFec100GPort_f,      1);
        CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_write_global_ctl_shared_fec(lchip, core_id, pcs_grp_idx, fld_num, fld_info));
#ifdef TMG_SERDES_SIM
        fld_num = 0;
        SET_REG_FIELD_INFO(fld_info, fld_num, 0, SharedMii0Cfg_cfgMiiTxRsFecEn0_f,    1);
        SET_REG_FIELD_INFO(fld_info, fld_num, 0, SharedMii0Cfg_cfgMiiTxAmInterval0_f, 319);
        CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_write_sharedmii0cfg(lchip, core_id, mac_grp_idx, 0, fld_num, fld_info));
        fld_num = 0;
        SET_REG_FIELD_INFO(fld_info, fld_num, 0, SharedMii0Cfg_cfgMiiTxRsFecEn0_f,    1);
        SET_REG_FIELD_INFO(fld_info, fld_num, 0, SharedMii0Cfg_cfgMiiTxAmInterval0_f, 319);
        CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_write_sharedmii0cfg(lchip, core_id, mac_grp_idx, 1, fld_num, fld_info));
        fld_num = 0;
        SET_REG_FIELD_INFO(fld_info, fld_num, 0, SharedMii0Cfg_cfgMiiTxRsFecEn0_f,    1);
        SET_REG_FIELD_INFO(fld_info, fld_num, 0, SharedMii0Cfg_cfgMiiTxAmInterval0_f, 319);
        CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_write_sharedmii0cfg(lchip, core_id, mac_grp_idx, 2, fld_num, fld_info));
        fld_num = 0;
        SET_REG_FIELD_INFO(fld_info, fld_num, 0, SharedMii0Cfg_cfgMiiTxRsFecEn0_f,    1);
        SET_REG_FIELD_INFO(fld_info, fld_num, 0, SharedMii0Cfg_cfgMiiTxAmInterval0_f, 319);
        CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_write_sharedmii0cfg(lchip, core_id, mac_grp_idx, 3, fld_num, fld_info));
#else
        fld_num = 0;
        SET_REG_FIELD_INFO(fld_info, fld_num, 0, SharedMii0Cfg_cfgMiiTxRsFecEn0_f,    1);
        SET_REG_FIELD_INFO(fld_info, fld_num, 0, SharedMii0Cfg_cfgMiiTxAmInterval0_f, 0x3fff);
        CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_write_sharedmii0cfg(lchip, core_id, mac_grp_idx, 0, fld_num, fld_info));
        fld_num = 0;
        SET_REG_FIELD_INFO(fld_info, fld_num, 0, SharedMii0Cfg_cfgMiiTxRsFecEn0_f,    1);
        SET_REG_FIELD_INFO(fld_info, fld_num, 0, SharedMii0Cfg_cfgMiiTxAmInterval0_f, 0x3fff);
        CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_write_sharedmii0cfg(lchip, core_id, mac_grp_idx, 1, fld_num, fld_info));
        fld_num = 0;
        SET_REG_FIELD_INFO(fld_info, fld_num, 0, SharedMii0Cfg_cfgMiiTxRsFecEn0_f,    1);
        SET_REG_FIELD_INFO(fld_info, fld_num, 0, SharedMii0Cfg_cfgMiiTxAmInterval0_f, 0x3fff);
        CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_write_sharedmii0cfg(lchip, core_id, mac_grp_idx, 2, fld_num, fld_info));
        fld_num = 0;
        SET_REG_FIELD_INFO(fld_info, fld_num, 0, SharedMii0Cfg_cfgMiiTxRsFecEn0_f,    1);
        SET_REG_FIELD_INFO(fld_info, fld_num, 0, SharedMii0Cfg_cfgMiiTxAmInterval0_f, 0x3fff);
        CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_write_sharedmii0cfg(lchip, core_id, mac_grp_idx, 3, fld_num, fld_info));

#endif
        fld_num = 0;
        SET_REG_FIELD_INFO(fld_info, fld_num, api_db->pcs_idx, XgFec0CtlSharedFec_cfgXgFec0TxWidth_f, 1);
        CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_write_xg_fec_ctl_shared_fec(lchip, core_id, pcs_grp_idx, 0, fld_num, fld_info));
        CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_write_xg_fec_ctl_shared_fec(lchip, core_id, pcs_grp_idx, 1, fld_num, fld_info));
        CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_write_xg_fec_ctl_shared_fec(lchip, core_id, pcs_grp_idx, 2, fld_num, fld_info));
        CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_write_xg_fec_ctl_shared_fec(lchip, core_id, pcs_grp_idx, 3, fld_num, fld_info));
        CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_write_xg_fec_ctl_shared_fec(lchip, core_id, pcs_grp_idx, 4, fld_num, fld_info));
        CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_write_xg_fec_ctl_shared_fec(lchip, core_id, pcs_grp_idx, 5, fld_num, fld_info));
        CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_write_xg_fec_ctl_shared_fec(lchip, core_id, pcs_grp_idx, 6, fld_num, fld_info));
        CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_write_xg_fec_ctl_shared_fec(lchip, core_id, pcs_grp_idx, 7, fld_num, fld_info));
    }
    else if (SYS_DMPS_FEC_TYPE_NONE == api_db->fec_type)
    {
        fld_num = 0;
        SET_REG_FIELD_INFO(fld_info, fld_num, 0, SharedPcsFecCfg_cgfecEn_f, 0);
        CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_write_shared_pcs_fec_cfg(lchip, core_id, pcs_grp_idx, fld_num, fld_info));

        fld_num = 0;
        SET_REG_FIELD_INFO(fld_info, fld_num, 0, GlobalCtlSharedFec_cfgSharedFecRxAmInterval0_f, 0x3fff);
        SET_REG_FIELD_INFO(fld_info, fld_num, 1, GlobalCtlSharedFec_cfgSharedFecRxAmInterval0_f, 0x3fff);
        SET_REG_FIELD_INFO(fld_info, fld_num, 2, GlobalCtlSharedFec_cfgSharedFecRxAmInterval0_f, 0x3fff);
        SET_REG_FIELD_INFO(fld_info, fld_num, 3, GlobalCtlSharedFec_cfgSharedFecRxAmInterval0_f, 0x3fff);
        SET_REG_FIELD_INFO(fld_info, fld_num, 3, GlobalCtlSharedFec_cfgSharedFec100GPort_f,      0);
        CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_write_global_ctl_shared_fec(lchip, core_id, pcs_grp_idx, fld_num, fld_info));
#ifdef TMG_SERDES_SIM
        fld_num = 0;
        SET_REG_FIELD_INFO(fld_info, fld_num, 0, SharedMii0Cfg_cfgMiiTxRsFecEn0_f,    0);
        SET_REG_FIELD_INFO(fld_info, fld_num, 0, SharedMii0Cfg_cfgMiiTxAmInterval0_f, 255);
        CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_write_sharedmii0cfg(lchip, core_id, mac_grp_idx, 0, fld_num, fld_info));
        fld_num = 0;
        SET_REG_FIELD_INFO(fld_info, fld_num, 0, SharedMii0Cfg_cfgMiiTxRsFecEn0_f,    0);
        SET_REG_FIELD_INFO(fld_info, fld_num, 0, SharedMii0Cfg_cfgMiiTxAmInterval0_f, 255);
        CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_write_sharedmii0cfg(lchip, core_id, mac_grp_idx, 1, fld_num, fld_info));
        fld_num = 0;
        SET_REG_FIELD_INFO(fld_info, fld_num, 0, SharedMii0Cfg_cfgMiiTxRsFecEn0_f,    0);
        SET_REG_FIELD_INFO(fld_info, fld_num, 0, SharedMii0Cfg_cfgMiiTxAmInterval0_f, 255);
        CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_write_sharedmii0cfg(lchip, core_id, mac_grp_idx, 2, fld_num, fld_info));
        fld_num = 0;
        SET_REG_FIELD_INFO(fld_info, fld_num, 0, SharedMii0Cfg_cfgMiiTxRsFecEn0_f,    0);
        SET_REG_FIELD_INFO(fld_info, fld_num, 0, SharedMii0Cfg_cfgMiiTxAmInterval0_f, 255);
        CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_write_sharedmii0cfg(lchip, core_id, mac_grp_idx, 3, fld_num, fld_info));
#else
        fld_num = 0;
        SET_REG_FIELD_INFO(fld_info, fld_num, 0, SharedMii0Cfg_cfgMiiTxRsFecEn0_f,    0);
        SET_REG_FIELD_INFO(fld_info, fld_num, 0, SharedMii0Cfg_cfgMiiTxAmInterval0_f, 0x3fff);
        CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_write_sharedmii0cfg(lchip, core_id, mac_grp_idx, 0, fld_num, fld_info));
        fld_num = 0;
        SET_REG_FIELD_INFO(fld_info, fld_num, 0, SharedMii0Cfg_cfgMiiTxRsFecEn0_f,    0);
        SET_REG_FIELD_INFO(fld_info, fld_num, 0, SharedMii0Cfg_cfgMiiTxAmInterval0_f, 0x3fff);
        CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_write_sharedmii0cfg(lchip, core_id, mac_grp_idx, 1, fld_num, fld_info));
        fld_num = 0;
        SET_REG_FIELD_INFO(fld_info, fld_num, 0, SharedMii0Cfg_cfgMiiTxRsFecEn0_f,    0);
        SET_REG_FIELD_INFO(fld_info, fld_num, 0, SharedMii0Cfg_cfgMiiTxAmInterval0_f, 0x3fff);
        CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_write_sharedmii0cfg(lchip, core_id, mac_grp_idx, 2, fld_num, fld_info));
        fld_num = 0;
        SET_REG_FIELD_INFO(fld_info, fld_num, 0, SharedMii0Cfg_cfgMiiTxRsFecEn0_f,    0);
        SET_REG_FIELD_INFO(fld_info, fld_num, 0, SharedMii0Cfg_cfgMiiTxAmInterval0_f, 0x3fff);
        CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_write_sharedmii0cfg(lchip, core_id, mac_grp_idx, 3, fld_num, fld_info));
#endif
        fld_num = 0;
        SET_REG_FIELD_INFO(fld_info, fld_num, api_db->pcs_idx, XgFec0CtlSharedFec_cfgXgFec0TxWidth_f, 1);
        CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_write_xg_fec_ctl_shared_fec(lchip, core_id, pcs_grp_idx, 0, fld_num, fld_info));
        CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_write_xg_fec_ctl_shared_fec(lchip, core_id, pcs_grp_idx, 1, fld_num, fld_info));
        CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_write_xg_fec_ctl_shared_fec(lchip, core_id, pcs_grp_idx, 2, fld_num, fld_info));
        CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_write_xg_fec_ctl_shared_fec(lchip, core_id, pcs_grp_idx, 3, fld_num, fld_info));
        CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_write_xg_fec_ctl_shared_fec(lchip, core_id, pcs_grp_idx, 4, fld_num, fld_info));
        CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_write_xg_fec_ctl_shared_fec(lchip, core_id, pcs_grp_idx, 5, fld_num, fld_info));
        CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_write_xg_fec_ctl_shared_fec(lchip, core_id, pcs_grp_idx, 6, fld_num, fld_info));
        CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_write_xg_fec_ctl_shared_fec(lchip, core_id, pcs_grp_idx, 7, fld_num, fld_info));
    }

#ifdef TMG_SERDES_SIM
    fld_num = 0;
    SET_REG_FIELD_INFO(fld_info, fld_num, 0, SharedPcsXlgCfg_rxAmInterval_f, 255);
    CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_write_shared_pcs_xlg_cfg(lchip, core_id, pcs_grp_idx, 0, fld_num, fld_info));
#endif


    return CTC_E_NONE;
}

int32
_sys_usw_dmps_shared_get_sgmii_link_status(uint8 lchip, sys_dmps_mac_api_db_t* api_db, uint8 type, uint32* p_value)
{
    uint8  core_id     = 0;
    uint8  mac_grp_idx = 0;
    uint8  pcs_grp_idx = 0;
    reg_field_info_t fld_info[1] = {{0}};

    core_id     = api_db->core_id;
    mac_grp_idx = api_db->mac_grp_idx;
    pcs_grp_idx = api_db->pcs_grp_idx;

    if (type == SYS_PORT_MAC_STATUS_TYPE_LINK)
    {
        SET_REG_SOURCE_FIELD_INFO(fld_info, 0, SharedMii0Status_dbgMiiRxLinkStatus0_f);
        CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_read_sharedmii0status(lchip, core_id, mac_grp_idx, api_db->mac_idx, 1, fld_info));
        *p_value = (fld_info[0].value) ? TRUE : FALSE;
    }

    if (type == SYS_PORT_MAC_STATUS_TYPE_CODE_ERR)
    {
        SET_REG_SOURCE_FIELD_INFO(fld_info, 0, SharedPcsSgmii0Status_codeErrCnt0_f);
        CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_read_shared_pcs_sgmii_status(lchip, core_id, pcs_grp_idx, api_db->pcs_idx, 1, fld_info));
        *p_value = fld_info[0].value;
    }

    if (type == SYS_PORT_MAC_STATUS_TYPE_LINK_RAW)
    {
        SET_REG_SOURCE_FIELD_INFO(fld_info, 0, SharedMii0Status_dbgMiiRxLinkStatusRaw0_f);
        CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_read_sharedmii0status(lchip, core_id, mac_grp_idx, api_db->mac_idx, 1, fld_info));
        *p_value = (fld_info[0].value) ? TRUE : FALSE;
    }

    return CTC_E_NONE;
}

int32
_sys_usw_dmps_shared_get_xfi_xxvg_link_status(uint8 lchip, sys_dmps_mac_api_db_t* api_db, uint8 type, uint32* p_value)
{
    uint8  core_id     = 0;
    uint8  mac_grp_idx = 0;
    uint8  pcs_grp_idx = 0;
    reg_field_info_t fld_info[2] = {{0}};

    core_id     = api_db->core_id;
    mac_grp_idx = api_db->mac_grp_idx;
    pcs_grp_idx = api_db->pcs_grp_idx;

    if (type == SYS_PORT_MAC_STATUS_TYPE_LINK)
    {
        SET_REG_SOURCE_FIELD_INFO(fld_info,     0, SharedMii0Status_dbgMiiRxLinkStatus0_f);
        SET_REG_SOURCE_FIELD_INFO(fld_info + 1, 0, SharedMii0Status_dbgMiiRxFaultType0_f);
        CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_read_sharedmii0status(lchip, core_id, mac_grp_idx, api_db->mac_idx, 2, fld_info));
        *p_value = (fld_info[0].value) ? (fld_info[1].value ? FALSE : TRUE) : FALSE;
    }

    if (type == SYS_PORT_MAC_STATUS_TYPE_CODE_ERR)
    {
        SET_REG_SOURCE_FIELD_INFO(fld_info,     0, SharedPcsXfi0Status_badBerCnt0_f);
        SET_REG_SOURCE_FIELD_INFO(fld_info + 1, 0, SharedPcsXfi0Status_hiBer0_f);
        CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_read_shared_pcs_xfi_status(lchip, core_id, pcs_grp_idx, api_db->pcs_idx, 2, fld_info));
        *p_value = fld_info[0].value;
    }

    if (type == SYS_PORT_MAC_STATUS_TYPE_LINK_RAW)
    {
        SET_REG_SOURCE_FIELD_INFO(fld_info, 0, SharedMii0Status_dbgMiiRxLinkStatusRaw0_f);
        CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_read_sharedmii0status(lchip, core_id, mac_grp_idx, api_db->mac_idx, 1, fld_info));
        *p_value = (fld_info[0].value) ? TRUE : FALSE;
    }

    return CTC_E_NONE;
}

int32
_sys_usw_dmps_shared_get_xlg_link_status(uint8 lchip, sys_dmps_mac_api_db_t* api_db, uint8 type, uint32* p_value)
{
    uint8  core_id     = 0;
    uint8  mac_grp_idx = 0;
    uint8  pcs_grp_idx = 0;
    reg_field_info_t fld_info[4] = {{0}};

    core_id     = api_db->core_id;
    mac_grp_idx = api_db->mac_grp_idx;
    pcs_grp_idx = api_db->pcs_grp_idx;

    if (type == SYS_PORT_MAC_STATUS_TYPE_LINK)
    {
        SET_REG_SOURCE_FIELD_INFO(fld_info,     0, SharedMii0Status_dbgMiiRxLinkStatus0_f);
        SET_REG_SOURCE_FIELD_INFO(fld_info + 1, 0, SharedMii0Status_dbgMiiRxFaultType0_f);
        CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_read_sharedmii0status(lchip, core_id, mac_grp_idx, api_db->mac_idx, 2, fld_info));
        *p_value = (fld_info[0].value) ? (fld_info[1].value ? FALSE : TRUE) : FALSE;
    }

    if (type == SYS_PORT_MAC_STATUS_TYPE_CODE_ERR)
    {
        SET_REG_SOURCE_FIELD_INFO(fld_info,     0, SharedPcsXlgStatus_bipErrCnt0_f);
        SET_REG_SOURCE_FIELD_INFO(fld_info + 1, 0, SharedPcsXlgStatus_bipErrCnt1_f);
        SET_REG_SOURCE_FIELD_INFO(fld_info + 2, 0, SharedPcsXlgStatus_bipErrCnt2_f);
        SET_REG_SOURCE_FIELD_INFO(fld_info + 3, 0, SharedPcsXlgStatus_bipErrCnt3_f);
        CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_read_shared_pcs_xlg_status(lchip, core_id, pcs_grp_idx, 4, fld_info));
       *p_value = fld_info[0].value+fld_info[1].value+fld_info[2].value+fld_info[3].value;
    }

    if (type == SYS_PORT_MAC_STATUS_TYPE_LINK_RAW)
    {
        SET_REG_SOURCE_FIELD_INFO(fld_info, 0, SharedMii0Status_dbgMiiRxLinkStatusRaw0_f);
        CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_read_sharedmii0status(lchip, core_id, mac_grp_idx, api_db->mac_idx, 1, fld_info));
        *p_value = (fld_info[0].value) ? TRUE : FALSE;
    }

    return CTC_E_NONE;
}

int32
_sys_usw_dmps_shared_get_lg_link_status(uint8 lchip, sys_dmps_mac_api_db_t* api_db, uint8 type, uint32* p_value)
{
    uint8  core_id     = 0;
    uint8  mac_grp_idx = 0;
    uint8  pcs_grp_idx = 0;
    reg_field_info_t fld_info[4] = {{0}};

    core_id     = api_db->core_id;
    mac_grp_idx = api_db->mac_grp_idx;
    pcs_grp_idx = api_db->pcs_grp_idx;

    if (type == SYS_PORT_MAC_STATUS_TYPE_LINK)
    {
        SET_REG_SOURCE_FIELD_INFO(fld_info,     0, SharedMii0Status_dbgMiiRxLinkStatus0_f);
        SET_REG_SOURCE_FIELD_INFO(fld_info + 1, 0, SharedMii0Status_dbgMiiRxFaultType0_f);
        CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_read_sharedmii0status(lchip, core_id, mac_grp_idx, api_db->mac_idx, 2, fld_info));
        *p_value = (fld_info[0].value) ? (fld_info[1].value ? FALSE : TRUE) : FALSE;
    }

    if (type == SYS_PORT_MAC_STATUS_TYPE_CODE_ERR)
    {
        /*First Lg use xlg status, second Lg use lg status*/
        if (0 == api_db->pcs_idx)
        {
            SET_REG_SOURCE_FIELD_INFO(fld_info,     0, SharedPcsXlgStatus_bipErrCnt0_f);
            SET_REG_SOURCE_FIELD_INFO(fld_info + 1, 0, SharedPcsXlgStatus_bipErrCnt1_f);
            SET_REG_SOURCE_FIELD_INFO(fld_info + 2, 0, SharedPcsXlgStatus_bipErrCnt2_f);
            SET_REG_SOURCE_FIELD_INFO(fld_info + 3, 0, SharedPcsXlgStatus_bipErrCnt3_f);
            CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_read_shared_pcs_xlg_status(lchip, core_id, pcs_grp_idx, 4, fld_info));
            *p_value = fld_info[0].value+fld_info[1].value+fld_info[2].value+fld_info[3].value;
        }
        else
        {
            SET_REG_SOURCE_FIELD_INFO(fld_info,     0, SharedPcsLgStatus_lgPcs1BipErrCnt0_f);
            SET_REG_SOURCE_FIELD_INFO(fld_info + 1, 0, SharedPcsLgStatus_lgPcs1BipErrCnt1_f);
            SET_REG_SOURCE_FIELD_INFO(fld_info + 2, 0, SharedPcsLgStatus_lgPcs1BipErrCnt2_f);
            SET_REG_SOURCE_FIELD_INFO(fld_info + 3, 0, SharedPcsLgStatus_lgPcs1BipErrCnt3_f);
            CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_read_shared_pcs_lg_status(lchip, core_id, pcs_grp_idx, 4, fld_info));
            *p_value = fld_info[0].value+fld_info[1].value+fld_info[2].value+fld_info[3].value;
        }
        SET_REG_SOURCE_FIELD_INFO(fld_info, 0, SharedPcsXfi0Status_errBlockCnt0_f);
        CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_read_shared_pcs_xfi_status(lchip, core_id, pcs_grp_idx, 0, 1, fld_info));
        *p_value += fld_info[0].value;
        SET_REG_SOURCE_FIELD_INFO(fld_info, 0, SharedPcsXfi0Status_errBlockCnt0_f);
        CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_read_shared_pcs_xfi_status(lchip, core_id, pcs_grp_idx, 1, 1, fld_info));
        *p_value += fld_info[0].value;
        SET_REG_SOURCE_FIELD_INFO(fld_info, 0, SharedPcsXfi0Status_errBlockCnt0_f);
        CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_read_shared_pcs_xfi_status(lchip, core_id, pcs_grp_idx, 2, 1, fld_info));
        *p_value += fld_info[0].value;
        SET_REG_SOURCE_FIELD_INFO(fld_info, 0, SharedPcsXfi0Status_errBlockCnt0_f);
        CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_read_shared_pcs_xfi_status(lchip, core_id, pcs_grp_idx, 3, 1, fld_info));
        *p_value += fld_info[0].value;
    }

    if (type == SYS_PORT_MAC_STATUS_TYPE_LINK_RAW)
    {
        SET_REG_SOURCE_FIELD_INFO(fld_info, 0, SharedMii0Status_dbgMiiRxLinkStatusRaw0_f);
        CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_read_sharedmii0status(lchip, core_id, mac_grp_idx, api_db->mac_idx, 1, fld_info));
        *p_value = (fld_info[0].value) ? TRUE : FALSE;
    }

    return CTC_E_NONE;
}

int32
_sys_usw_dmps_shared_get_cg_link_status(uint8 lchip, sys_dmps_mac_api_db_t* api_db, uint8 type, uint32* p_value)
{
    uint8  core_id     = 0;
    uint8  mac_grp_idx = 0;
    uint8  pcs_grp_idx = 0;
    reg_field_info_t fld_info[4] = {{0}};

    core_id     = api_db->core_id;
    mac_grp_idx = api_db->mac_grp_idx;
    pcs_grp_idx = api_db->pcs_grp_idx;

    if (type == SYS_PORT_MAC_STATUS_TYPE_LINK)
    {
        SET_REG_SOURCE_FIELD_INFO(fld_info,     0, SharedMii0Status_dbgMiiRxLinkStatus0_f);
        SET_REG_SOURCE_FIELD_INFO(fld_info + 1, 0, SharedMii0Status_dbgMiiRxFaultType0_f);
        CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_read_sharedmii0status(lchip, core_id, mac_grp_idx, api_db->mac_idx, 2, fld_info));
        *p_value = (fld_info[0].value) ? (fld_info[1].value ? FALSE : TRUE) : FALSE;
    }

    if (type == SYS_PORT_MAC_STATUS_TYPE_CODE_ERR)
    {
        SET_REG_SOURCE_FIELD_INFO(fld_info, 0, SharedPcsXfi0Status_errBlockCnt0_f);
        CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_read_shared_pcs_xfi_status(lchip, core_id, pcs_grp_idx, 0, 1, fld_info));
        *p_value = fld_info[0].value;
        SET_REG_SOURCE_FIELD_INFO(fld_info, 0, SharedPcsXfi0Status_errBlockCnt0_f);
        CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_read_shared_pcs_xfi_status(lchip, core_id, pcs_grp_idx, 1, 1, fld_info));
        *p_value += fld_info[0].value;
        SET_REG_SOURCE_FIELD_INFO(fld_info, 0, SharedPcsXfi0Status_errBlockCnt0_f);
        CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_read_shared_pcs_xfi_status(lchip, core_id, pcs_grp_idx, 2, 1, fld_info));
        *p_value += fld_info[0].value;
        SET_REG_SOURCE_FIELD_INFO(fld_info, 0, SharedPcsXfi0Status_errBlockCnt0_f);
        CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_read_shared_pcs_xfi_status(lchip, core_id, pcs_grp_idx, 3, 1, fld_info));
        *p_value += fld_info[0].value;
    }

    if (type == SYS_PORT_MAC_STATUS_TYPE_LINK_RAW)
    {
        SET_REG_SOURCE_FIELD_INFO(fld_info, 0, SharedMii0Status_dbgMiiRxLinkStatusRaw0_f);
        CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_read_sharedmii0status(lchip, core_id, mac_grp_idx, api_db->mac_idx, 1, fld_info));
        *p_value = (fld_info[0].value) ? TRUE : FALSE;
    }

    return CTC_E_NONE;
}

int32
_sys_usw_dmps_shared_get_sgmii_pcs_link_status(uint8 lchip, sys_dmps_mac_api_db_t* api_db, uint32* p_is_up)
{
    uint8  core_id     = 0;
    uint8  pcs_idx     = 0;
    uint8  pcs_grp_idx = 0;
    reg_field_info_t fld_info[1] = {{0}};

    core_id     = api_db->core_id;
    pcs_idx     = api_db->pcs_idx;
    pcs_grp_idx = api_db->pcs_grp_idx;

    SET_REG_SOURCE_FIELD_INFO(fld_info, 0, SharedPcsSgmii0Status_sgmiiSyncStatus0_f);
    CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_read_shared_pcs_sgmii_status(lchip, core_id, pcs_grp_idx, pcs_idx, 1, fld_info));
    *p_is_up = fld_info[0].value;

    return CTC_E_NONE;
}

int32
_sys_usw_dmps_shared_get_xfi_pcs_link_status(uint8 lchip, sys_dmps_mac_api_db_t* api_db, uint32* p_is_up)
{
    uint8  core_id     = 0;
    uint8  pcs_idx     = 0;
    uint8  pcs_grp_idx = 0;
    reg_field_info_t fld_info[1] = {{0}};

    core_id     = api_db->core_id;
    pcs_idx     = api_db->pcs_idx;
    pcs_grp_idx = api_db->pcs_grp_idx;

    SET_REG_SOURCE_FIELD_INFO(fld_info, 0, SharedPcsXfi0Status_xfiSyncStatus0_f);
    CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_read_shared_pcs_xfi_status(lchip, core_id, pcs_grp_idx, pcs_idx, 1, fld_info));
    *p_is_up = fld_info[0].value;

    return CTC_E_NONE;
}

int32
_sys_usw_dmps_shared_get_xlg_pcs_link_status(uint8 lchip, sys_dmps_mac_api_db_t* api_db, uint32* p_is_up)
{
    uint8  core_id     = 0;
    uint8  pcs_grp_idx = 0;
    reg_field_info_t fld_info[1] = {{0}};

    core_id     = api_db->core_id;
    pcs_grp_idx = api_db->pcs_grp_idx;

    SET_REG_SOURCE_FIELD_INFO(fld_info, 0, SharedPcsXlgStatus_alignStatus0_f);
    CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_read_shared_pcs_xlg_status(lchip, core_id, pcs_grp_idx, 1, fld_info));
    *p_is_up = fld_info[0].value;

    return CTC_E_NONE;
}

int32
_sys_usw_dmps_shared_get_lg_pcs_link_status(uint8 lchip, sys_dmps_mac_api_db_t* api_db, uint32* p_is_up)
{
    uint8  core_id     = 0;
    uint8  pcs_grp_idx = 0;
    reg_field_info_t fld_info[1] = {{0}};

    core_id     = api_db->core_id;
    pcs_grp_idx = api_db->pcs_grp_idx;

    if (0 == api_db->pcs_idx)
    {
        SET_REG_SOURCE_FIELD_INFO(fld_info, 0, SharedPcsXlgStatus_alignStatus0_f);
        CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_read_shared_pcs_xlg_status(lchip, core_id, pcs_grp_idx, 1, fld_info));
    }
    else
    {
        SET_REG_SOURCE_FIELD_INFO(fld_info, 0, SharedPcsLgStatus_lgPcs1AlignStatus_f);
        CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_read_shared_pcs_lg_status(lchip, core_id, pcs_grp_idx, 1, fld_info));
    }
    *p_is_up = fld_info[0].value;

    return CTC_E_NONE;
}

int32
_sys_usw_dmps_shared_get_cg_pcs_link_status(uint8 lchip, sys_dmps_mac_api_db_t* api_db, uint32* p_is_up)
{
    uint8  core_id     = 0;
    uint8  pcs_grp_idx = 0;
    reg_field_info_t fld_info[1] = {{0}};

    core_id     = api_db->core_id;
    pcs_grp_idx = api_db->pcs_grp_idx;

    SET_REG_SOURCE_FIELD_INFO(fld_info, 0, SharedPcsCgStatus_cgPcsAlignStatus_f);
    CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_read_shared_pcs_cg_status(lchip, core_id, pcs_grp_idx, 1, fld_info));
    *p_is_up = fld_info[0].value;

    return CTC_E_NONE;
}



#define ___SHARED_SET_API___

int32
sys_usw_dmps_shared_set_mac_tx_en(uint8 lchip, sys_dmps_mac_api_db_t* api_db, uint32 enable)
{
    CTC_PTR_VALID_CHECK(api_db);

    if ((CTC_CHIP_SERDES_XFI_MODE == api_db->if_mode) || (CTC_CHIP_SERDES_XLG_R2_MODE == api_db->if_mode) ||
        (CTC_CHIP_SERDES_XLG_MODE == api_db->if_mode) || (CTC_CHIP_SERDES_XXVG_MODE == api_db->if_mode) ||
        (CTC_CHIP_SERDES_LG_MODE == api_db->if_mode)  || (CTC_CHIP_SERDES_CG_MODE == api_db->if_mode))
    {
        if (enable)
        {
            if (CTC_PORT_FEC_TYPE_NONE != api_db->fec_type)
            {
                CTC_ERROR_RETURN(_sys_usw_dmps_shared_set_fec_rst(lchip, api_db, DMPS_TX, 0));
            }
            CTC_ERROR_RETURN(_sys_usw_dmps_shared_set_mac_tx_en(lchip, api_db, enable));
        }
        else
        {
            CTC_ERROR_RETURN(_sys_usw_dmps_shared_set_mac_tx_en(lchip, api_db, enable));
            if (CTC_PORT_FEC_TYPE_NONE != api_db->fec_type)
            {
                CTC_ERROR_RETURN(_sys_usw_dmps_shared_set_fec_rst(lchip, api_db, DMPS_TX, 1));
            }
        }
    }
    else
    {
        CTC_ERROR_RETURN(_sys_usw_dmps_shared_set_mac_tx_en(lchip, api_db, enable));
    }

    return CTC_E_NONE;
}

int32
sys_usw_dmps_shared_set_mac_rx_en(uint8 lchip, sys_dmps_mac_api_db_t* api_db, uint32 enable)
{
    CTC_PTR_VALID_CHECK(api_db);

    if ((CTC_CHIP_SERDES_XFI_MODE == api_db->if_mode) || (CTC_CHIP_SERDES_XLG_R2_MODE == api_db->if_mode) ||
        (CTC_CHIP_SERDES_XLG_MODE == api_db->if_mode) || (CTC_CHIP_SERDES_XXVG_MODE == api_db->if_mode) ||
        (CTC_CHIP_SERDES_LG_MODE == api_db->if_mode)  || (CTC_CHIP_SERDES_CG_MODE == api_db->if_mode))
    {
        if (enable)
        {
            CTC_ERROR_RETURN(_sys_usw_dmps_shared_set_mac_rx_en(lchip, api_db, enable));
            if (CTC_PORT_FEC_TYPE_NONE != api_db->fec_type)
            {
                CTC_ERROR_RETURN(_sys_usw_dmps_shared_set_fec_rst(lchip, api_db, DMPS_RX, 0));
            }
        }
        else
        {
            if (CTC_PORT_FEC_TYPE_NONE != api_db->fec_type)
            {
                CTC_ERROR_RETURN(_sys_usw_dmps_shared_set_fec_rst(lchip, api_db, DMPS_RX, 1));
            }
            CTC_ERROR_RETURN(_sys_usw_dmps_shared_set_mac_rx_en(lchip, api_db, enable));
        }
    }
    else
    {
        CTC_ERROR_RETURN(_sys_usw_dmps_shared_set_mac_rx_en(lchip, api_db, enable));
    }

    return CTC_E_NONE;
}

int32
sys_usw_dmps_shared_set_fec(uint8 lchip, sys_dmps_mac_api_db_t* api_db)
{
    CTC_PTR_VALID_CHECK(api_db);

    switch(api_db->if_mode)
    {
        case CTC_CHIP_SERDES_XFI_MODE:
            CTC_ERROR_RETURN(_sys_usw_dmps_shared_set_fec_xfi(lchip, api_db));
            break;
        case CTC_CHIP_SERDES_XXVG_MODE:
            CTC_ERROR_RETURN(_sys_usw_dmps_shared_set_fec_xxvg(lchip, api_db));
            break;
        case CTC_CHIP_SERDES_XLG_MODE:
            CTC_ERROR_RETURN(_sys_usw_dmps_shared_set_fec_xlg(lchip, api_db));
            break;
        case CTC_CHIP_SERDES_LG_MODE:
        case CTC_CHIP_SERDES_XLG_R2_MODE:
            CTC_ERROR_RETURN(_sys_usw_dmps_shared_set_fec_lg(lchip, api_db));
            break;
        case CTC_CHIP_SERDES_CG_MODE:
            CTC_ERROR_RETURN(_sys_usw_dmps_shared_set_fec_cg(lchip, api_db));
            break;
        default:
            break;
    }

    return CTC_E_NONE;
}

int32
sys_usw_dmps_shared_set_mode(uint8 lchip, sys_dmps_mac_api_db_t* api_db, sys_dmps_api_cfg_t cfg_list[])
{
    uint8  core_id     = 0;
    uint8  mac_grp_idx = 0;
    uint8  pcs_grp_idx = 0;
    uint8  fld_num     = 0;
    reg_field_info_t fld_info[25] = {{0}};

    CTC_PTR_VALID_CHECK(api_db);
    CTC_PTR_VALID_CHECK(cfg_list);

    core_id     = api_db->core_id;
    mac_grp_idx = api_db->mac_grp_idx;
    pcs_grp_idx = api_db->pcs_grp_idx;

    if(DRV_IS_TMG(lchip))
    {
        fld_num = 0;
        SYS_DMPS_API_CFG_FIELD(cfg_list[QUAD_SGMAC_RX_BUF_MODE], fld_info, fld_num, 0, QuadSgmacCfg_cfgQuadSgmacRxBufMode_f);
        SYS_DMPS_API_CFG_FIELD(cfg_list[QUAD_SGMAC_TX_BUF_MODE], fld_info, fld_num, 0, QuadSgmacCfg_cfgQuadSgmacTxBufMode_f);
        CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_write_quad_sgmac_cfg(lchip, core_id, mac_grp_idx, fld_num, fld_info));

        fld_num = 0;
        SYS_DMPS_API_CFG_FIELD(cfg_list[SGMAC0_TX_OUTPUT_WIDTH], 
            fld_info, fld_num, 0, Sgmac0TxCfg_cfgSgmac0TxOutputWidth_f);
        SYS_DMPS_API_CFG_FIELD(cfg_list[SGMAC0_TX_WAIT_CAPTURE_TS], 
            fld_info, fld_num, 0, Sgmac0TxCfg_cfgSgmac0TxWaitCaptureTs_f);
        SYS_DMPS_API_CFG_FIELD(cfg_list[SGMAC0_TX_KEEP_TS_EN], 
            fld_info, fld_num, 0, Sgmac0TxCfg_cfgSgmac0TxKeepTsEn_f);
        CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_write_sgmac_tx_cfg(lchip, core_id, mac_grp_idx, api_db->mac_idx, fld_num, fld_info));

        fld_num = 0;
        SYS_DMPS_API_CFG_FIELD(cfg_list[SGMAC0_RX_INPUT_WIDTH], 
            fld_info, fld_num, 0, Sgmac0RxCfg_cfgSgmac0RxInputWidth_f);
        CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_write_sgmac_rx_cfg(lchip, core_id, mac_grp_idx, api_db->mac_idx, fld_num, fld_info));
    }

    fld_num = 0;
    SYS_DMPS_API_CFG_FIELD(cfg_list[SHARED_MII0_TX_PACE_DEC_VALUE], fld_info, fld_num, 0, SharedMii0Cfg_cfgMiiTxPaceDecValue0_f);
    SYS_DMPS_API_CFG_FIELD(cfg_list[SHARED_MII0_TX_PACE_INC_VALUE], fld_info, fld_num, 0, SharedMii0Cfg_cfgMiiTxPaceIncValue0_f);
    SYS_DMPS_API_CFG_FIELD(cfg_list[SHARED_MII0_SPEED_RX],          fld_info, fld_num, 0, SharedMii0Cfg_cfgMiiSpeedRx0_f);
    SYS_DMPS_API_CFG_FIELD(cfg_list[SHARED_MII0_TX_AM_INTERVAL],    fld_info, fld_num, 0, SharedMii0Cfg_cfgMiiTxAmInterval0_f);
    SYS_DMPS_API_CFG_FIELD(cfg_list[SHARED_MII0_TX_RS_FEC_EN],      fld_info, fld_num, 0, SharedMii0Cfg_cfgMiiTxRsFecEn0_f);
    SYS_DMPS_API_CFG_FIELD(cfg_list[SHARED_MII0_FX_MODE],           fld_info, fld_num, 0, SharedMii0Cfg_cfgMiiFXMode0_f);
    SYS_DMPS_API_CFG_FIELD(cfg_list[SHARED_MII0_RX_SAMPLE_SLOT],    fld_info, fld_num, 0, SharedMii0Cfg_cfgMiiRxSampleSlot0_f);
    SYS_DMPS_API_CFG_FIELD(cfg_list[SHARED_MII0_RX_SAMPLE_CNT],     fld_info, fld_num, 0, SharedMii0Cfg_cfgMiiRxSampleCnt0_f);
    SYS_DMPS_API_CFG_FIELD(cfg_list[SHARED_MII0_TX_REPLICATE_SLOT], fld_info, fld_num, 0, SharedMii0Cfg_cfgMiiTxReplicateSlot0_f);
    SYS_DMPS_API_CFG_FIELD(cfg_list[SHARED_MII0_TX_REPLICATE_CNT],  fld_info, fld_num, 0, SharedMii0Cfg_cfgMiiTxReplicateCnt0_f);
    SYS_DMPS_API_CFG_FIELD(cfg_list[SHARED_MII0_TX_AFULL_THRD],     fld_info, fld_num, 0, SharedMii0Cfg_cfgMiiTxAFullThrd0_f);
    SYS_DMPS_API_CFG_FIELD(cfg_list[SHARED_MII0_USXGMII_EN],        fld_info, fld_num, 0, SharedMii0Cfg_cfgMiiUsxgmiiEn0_f);    
    SYS_DMPS_API_CFG_FIELD(cfg_list[SHARED_MII0_SPEED],             fld_info, fld_num, 0, SharedMii0Cfg_cfgMiiSpeed0_f);
    SYS_DMPS_API_CFG_FIELD(cfg_list[SHARED_MII0_USGMII_EN],         fld_info, fld_num, 0, SharedMii0Cfg_cfgMiiUsgmiiEn0_f);
    CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_write_sharedmii0cfg(lchip, core_id, mac_grp_idx, api_db->mac_idx, fld_num, fld_info));

    fld_num = 0;
    SYS_DMPS_API_CFG_FIELD(cfg_list[SHARED_MII_QSGMII_MODE],         fld_info, fld_num, 0, SharedMiiCfg_cfgMiiQsgmiiMode_f);
    SYS_DMPS_API_CFG_FIELD(cfg_list[SHARED_MII_RXAUI_MODE],          fld_info, fld_num, 0, SharedMiiCfg_cfgMiiRXauiMode0_f);
    SYS_DMPS_API_CFG_FIELD(cfg_list[SHARED_MII_XAUI_MODE],           fld_info, fld_num, 0, SharedMiiCfg_cfgMiiXauiMode_f);
    SYS_DMPS_API_CFG_FIELD(cfg_list[SHARED_MII_MUX_MODE],            fld_info, fld_num, 0, SharedMiiCfg_cfgSharedMiiMuxMode_f);
    SYS_DMPS_API_CFG_FIELD(cfg_list[SHARED_MII_TX_IPG_DEL_INTERVAL], fld_info, fld_num, 0, SharedMiiCfg_cfgMiiTxIpgDelInterval_f);
    CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_write_shared_mii_cfg(lchip, core_id, mac_grp_idx, fld_num, fld_info));

    fld_num = 0;
    SYS_DMPS_API_CFG_FIELD(cfg_list[SHARED_PCS_FX_MODE0],       fld_info, fld_num, 0, SharedPcsCfg_fxMode0_f);
    SYS_DMPS_API_CFG_FIELD(cfg_list[SHARED_PCS_FX_MODE1],       fld_info, fld_num, 1, SharedPcsCfg_fxMode0_f);
    SYS_DMPS_API_CFG_FIELD(cfg_list[SHARED_PCS_FX_MODE2],       fld_info, fld_num, 2, SharedPcsCfg_fxMode0_f);
    SYS_DMPS_API_CFG_FIELD(cfg_list[SHARED_PCS_FX_MODE3],       fld_info, fld_num, 3, SharedPcsCfg_fxMode0_f);
    SYS_DMPS_API_CFG_FIELD(cfg_list[SHARED_PCS_XXVG_MODE0],     fld_info, fld_num, 0, SharedPcsCfg_xxvgMode0_f);
    SYS_DMPS_API_CFG_FIELD(cfg_list[SHARED_PCS_XXVG_MODE1],     fld_info, fld_num, 1, SharedPcsCfg_xxvgMode0_f);
    SYS_DMPS_API_CFG_FIELD(cfg_list[SHARED_PCS_XXVG_MODE2],     fld_info, fld_num, 2, SharedPcsCfg_xxvgMode0_f);
    SYS_DMPS_API_CFG_FIELD(cfg_list[SHARED_PCS_XXVG_MODE3],     fld_info, fld_num, 3, SharedPcsCfg_xxvgMode0_f);
    SYS_DMPS_API_CFG_FIELD(cfg_list[SHARED_PCS_CG_MODE],        fld_info, fld_num, 0, SharedPcsCfg_cgMode_f);
    SYS_DMPS_API_CFG_FIELD(cfg_list[SHARED_PCS_LG_MODE0],       fld_info, fld_num, 0, SharedPcsCfg_lgMode0_f);
    SYS_DMPS_API_CFG_FIELD(cfg_list[SHARED_PCS_LG_MODE1],       fld_info, fld_num, 2, SharedPcsCfg_lgMode0_f);
    SYS_DMPS_API_CFG_FIELD(cfg_list[SHARED_PCS_XLG_MODE],       fld_info, fld_num, 0, SharedPcsCfg_xlgMode_f);
    SYS_DMPS_API_CFG_FIELD(cfg_list[SHARED_PCS_SGMII_MODE_TX0], fld_info, fld_num, 0, SharedPcsCfg_sgmiiModeTx0_f);
    SYS_DMPS_API_CFG_FIELD(cfg_list[SHARED_PCS_SGMII_MODE_TX1], fld_info, fld_num, 1, SharedPcsCfg_sgmiiModeTx0_f);
    SYS_DMPS_API_CFG_FIELD(cfg_list[SHARED_PCS_SGMII_MODE_TX2], fld_info, fld_num, 2, SharedPcsCfg_sgmiiModeTx0_f);
    SYS_DMPS_API_CFG_FIELD(cfg_list[SHARED_PCS_SGMII_MODE_TX3], fld_info, fld_num, 3, SharedPcsCfg_sgmiiModeTx0_f);
    SYS_DMPS_API_CFG_FIELD(cfg_list[SHARED_PCS_SGMII_MODE_RX0], fld_info, fld_num, 0, SharedPcsCfg_sgmiiModeRx0_f);
    SYS_DMPS_API_CFG_FIELD(cfg_list[SHARED_PCS_SGMII_MODE_RX1], fld_info, fld_num, 1, SharedPcsCfg_sgmiiModeRx0_f);
    SYS_DMPS_API_CFG_FIELD(cfg_list[SHARED_PCS_SGMII_MODE_RX2], fld_info, fld_num, 2, SharedPcsCfg_sgmiiModeRx0_f);
    SYS_DMPS_API_CFG_FIELD(cfg_list[SHARED_PCS_SGMII_MODE_RX3], fld_info, fld_num, 3, SharedPcsCfg_sgmiiModeRx0_f);
    SYS_DMPS_API_CFG_FIELD(cfg_list[SHARED_PCS_UNIDIR0],        fld_info, fld_num, 0, SharedPcsCfg_unidirectionEn0_f);
    SYS_DMPS_API_CFG_FIELD(cfg_list[SHARED_PCS_UNIDIR1],        fld_info, fld_num, 1, SharedPcsCfg_unidirectionEn0_f);
    SYS_DMPS_API_CFG_FIELD(cfg_list[SHARED_PCS_UNIDIR2],        fld_info, fld_num, 2, SharedPcsCfg_unidirectionEn0_f);
    SYS_DMPS_API_CFG_FIELD(cfg_list[SHARED_PCS_UNIDIR3],        fld_info, fld_num, 3, SharedPcsCfg_unidirectionEn0_f);
    CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_write_shared_pcs_cfg(lchip, core_id, pcs_grp_idx, fld_num, fld_info));

    fld_num = 0;
    SYS_DMPS_API_CFG_FIELD(cfg_list[SHARED_PCS_SERDES_RX_POP_CNT], fld_info, fld_num, 0, SharedPcsSerdes0Cfg_rxPopCntCfg0_f);
    CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_write_shared_pcs_serdes_cfg(lchip, core_id, pcs_grp_idx, api_db->pcs_idx, fld_num, fld_info));

    fld_num = 0;
    SYS_DMPS_API_CFG_FIELD(cfg_list[SHARED_PCSFEC_XFI_FEC_EN], fld_info, fld_num, 0, SharedPcsFecCfg_xfiPcsFecEn0_f);
    CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_write_shared_pcs_fec_cfg(lchip, core_id, pcs_grp_idx, fld_num, fld_info));
    /* clear fec cfg */
    CTC_ERROR_RETURN(sys_usw_dmps_shared_set_fec(lchip, api_db));

    return CTC_E_NONE;
}

int32
sys_usw_dmps_shared_set_cl37_en(uint8 lchip, sys_dmps_mac_api_db_t* api_db, uint32 enable)
{
    uint8  core_id     = 0;
    uint8  pcs_grp_idx = 0;
    uint8  fld_num     = 0;
    reg_field_info_t fld_info[1] = {{0}};

    CTC_PTR_VALID_CHECK(api_db);

    core_id     = api_db->core_id;
    pcs_grp_idx = api_db->pcs_grp_idx;

    fld_num = 0;
    SET_REG_FIELD_INFO(fld_info, fld_num, 0, SharedPcsSgmii0Cfg_anEnable0_f, (enable ? 1 : 0));
    CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_write_shared_pcs_sgmii_cfg(lchip, core_id, pcs_grp_idx, api_db->pcs_idx, fld_num, fld_info));

    return CTC_E_NONE;
}

int32
sys_usw_dmps_shared_set_cl37_mode(uint8 lchip, sys_dmps_mac_api_db_t* api_db, uint32 p_value)
{
    uint8  core_id     = 0;
    uint8  pcs_grp_idx = 0;
    uint8  fld_num     = 0;
    reg_field_info_t fld_info[1] = {{0}};

    CTC_PTR_VALID_CHECK(api_db);

    core_id     = api_db->core_id;
    pcs_grp_idx = api_db->pcs_grp_idx;

    fld_num = 0;
    SET_REG_FIELD_INFO(fld_info, fld_num, 0, SharedPcsSgmii0Cfg_anegMode0_f, p_value);
    CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_write_shared_pcs_sgmii_cfg(lchip, core_id, pcs_grp_idx, api_db->pcs_idx, fld_num, fld_info));

    return CTC_E_NONE;
}

int32
sys_usw_dmps_shared_set_cl73_en(uint8 lchip, sys_dmps_mac_api_db_t* api_db, uint32 p_value)
{
    CTC_PTR_VALID_CHECK(api_db);
    return CTC_E_NONE;
}

int32
sys_usw_dmps_shared_set_link_filter(uint8 lchip, sys_dmps_mac_api_db_t* api_db, uint32 en, uint32 value)
{
    uint8  core_id     = 0;
    uint8  mac_grp_idx = 0;
    uint8  fld_num     = 0;
    reg_field_info_t fld_info[2] = {{0}};

    CTC_PTR_VALID_CHECK(api_db);

    core_id     = api_db->core_id;
    mac_grp_idx = api_db->mac_grp_idx;

    fld_num = 0;
    SET_REG_FIELD_INFO(fld_info, fld_num, 0, SharedMii0Cfg_cfgMiiRxLinkFilterEn0_f,    en);
    SET_REG_FIELD_INFO(fld_info, fld_num, 0, SharedMii0Cfg_cfgMiiRxLinkFilterTimer0_f, value);
    CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_write_sharedmii0cfg(lchip, core_id, mac_grp_idx, api_db->mac_idx, fld_num, fld_info));

    return CTC_E_NONE;
}

int32 
sys_usw_dmps_shared_set_fault_filter(uint8 lchip, sys_dmps_mac_api_db_t* api_db, uint32 en)
{
    uint8  core_id     = 0;
    uint8  mac_grp_idx = 0;
    uint8  fld_num     = 0;
    reg_field_info_t fld_info[2] = {{0}};

    CTC_PTR_VALID_CHECK(api_db);

    core_id     = api_db->core_id;
    mac_grp_idx = api_db->mac_grp_idx;

    fld_num = 0;
    SET_REG_FIELD_INFO(fld_info, fld_num, 0, SharedMii0Cfg_cfgMiiRxLinkFaultFilterDisable0_f, !en);
    CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_write_sharedmii0cfg(lchip, core_id, mac_grp_idx, api_db->mac_idx, fld_num, fld_info));

    return CTC_E_NONE;
}


int32
sys_usw_dmps_shared_set_fault_mask_link(uint8 lchip, sys_dmps_mac_api_db_t* api_db, uint32 value)
{
    uint8  core_id     = 0;
    uint8  mac_grp_idx = 0;
    uint8  fld_num     = 0;
    reg_field_info_t fld_info[1] = {{0}};

    CTC_PTR_VALID_CHECK(api_db);

    core_id     = api_db->core_id;
    mac_grp_idx = api_db->mac_grp_idx;

    SET_REG_FIELD_INFO(fld_info, fld_num, 0, SharedMii0Cfg_cfgMiiFaultMaskLinkEn0_f, value);
    CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_write_sharedmii0cfg(lchip, core_id, mac_grp_idx, api_db->mac_idx, fld_num, fld_info));

    return CTC_E_NONE;
}

int32
sys_usw_dmps_shared_set_ignore_fault(uint8 lchip, sys_dmps_mac_api_db_t* api_db, uint32 ignore_en)
{
    uint8  core_id     = 0;
    uint8  mac_grp_idx = 0;
    uint8  fld_num     = 0;
    uint32 value       = ignore_en ? 1 : 0;
    reg_field_info_t fld_info[3] = {{0}};

    CTC_PTR_VALID_CHECK(api_db);

    core_id     = api_db->core_id;
    mac_grp_idx = api_db->mac_grp_idx;

    fld_num = 0;
    SET_REG_FIELD_INFO(fld_info, fld_num, 0, SharedMii0Cfg_cfgMiiIgnoreRemoteFault0_f, value);
    SET_REG_FIELD_INFO(fld_info, fld_num, 0, SharedMii0Cfg_cfgMiiIgnoreLocalFault0_f,  value);
    SET_REG_FIELD_INFO(fld_info, fld_num, 0, SharedMii0Cfg_cfgMiiIgnoreLintFault0_f,   value);
    CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_write_sharedmii0cfg(lchip, core_id, mac_grp_idx, api_db->mac_idx, fld_num, fld_info));

    return CTC_E_NONE;
}


int32
sys_usw_dmps_shared_set_unidir_en(uint8 lchip, sys_dmps_mac_api_db_t* api_db, uint32 enable)
{
    uint8  core_id     = 0;
    uint8  mac_grp_idx = 0;
    uint8  pcs_grp_idx = 0;
    uint8  fld_num     = 0;
    uint32 value       = enable ? 1 : 0;
    reg_field_info_t fld_info[3] = {{0}};

    CTC_PTR_VALID_CHECK(api_db);

    core_id     = api_db->core_id;
    mac_grp_idx = api_db->mac_grp_idx;
    pcs_grp_idx = api_db->pcs_grp_idx;

    if((CTC_CHIP_SERDES_SGMII_MODE == api_db->if_mode)|| (CTC_CHIP_SERDES_2DOT5G_MODE == api_db->if_mode))
    {
        fld_num = 0;
        SET_REG_FIELD_INFO(fld_info, fld_num, api_db->pcs_idx, SharedPcsCfg_unidirectionEn0_f, value);
        CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_write_shared_pcs_cfg(lchip, core_id, pcs_grp_idx, fld_num, fld_info));
    }
    else
    {
        fld_num = 0;
        SET_REG_FIELD_INFO(fld_info, fld_num, 0, SharedMii0Cfg_cfgMiiIgnoreRemoteFault0_f, value);
        SET_REG_FIELD_INFO(fld_info, fld_num, 0, SharedMii0Cfg_cfgMiiIgnoreLocalFault0_f,  value);
        SET_REG_FIELD_INFO(fld_info, fld_num, 0, SharedMii0Cfg_cfgMiiIgnoreLintFault0_f,   value);
        CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_write_sharedmii0cfg(lchip, core_id, mac_grp_idx, api_db->mac_idx, fld_num, fld_info));
    }
 
    return CTC_E_NONE;
}

int32
sys_usw_dmps_shared_get_unidir_en(uint8 lchip, sys_dmps_mac_api_db_t* api_db, uint32* p_en)
{
    uint8  core_id     = 0;
    uint8  mac_grp_idx = 0;
    uint8  pcs_grp_idx = 0;
    reg_field_info_t fld_info[3] = {{0}};

    CTC_PTR_VALID_CHECK(api_db);
    CTC_PTR_VALID_CHECK(p_en);

    core_id     = api_db->core_id;
    mac_grp_idx = api_db->mac_grp_idx;
    pcs_grp_idx = api_db->pcs_grp_idx;

    if((CTC_CHIP_SERDES_SGMII_MODE == api_db->if_mode)|| (CTC_CHIP_SERDES_2DOT5G_MODE == api_db->if_mode))
    {
        SET_REG_SOURCE_FIELD_INFO(fld_info, 0, SharedPcsCfg_unidirectionEn0_f);
        CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_read_shared_pcs_cfg(lchip, core_id, pcs_grp_idx, 1, fld_info));
        *p_en = (0 != fld_info[0].value) ? TRUE : FALSE;
    }
    else
    {
        SET_REG_SOURCE_FIELD_INFO(fld_info,   0, SharedMii0Cfg_cfgMiiIgnoreRemoteFault0_f);
        SET_REG_SOURCE_FIELD_INFO(fld_info+1, 0, SharedMii0Cfg_cfgMiiIgnoreLocalFault0_f);
        SET_REG_SOURCE_FIELD_INFO(fld_info+2, 0, SharedMii0Cfg_cfgMiiIgnoreLintFault0_f);
        CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_read_sharedmii0cfg(lchip, core_id, mac_grp_idx, api_db->mac_idx, 3, fld_info));
         *p_en = (fld_info[0].value || fld_info[1].value || fld_info[2].value) ? TRUE : FALSE;
    }
 
    return CTC_E_NONE;
}

int32
sys_usw_dmps_shared_set_loopback(uint8 lchip, sys_dmps_mac_api_db_t* api_db, uint32 p_value)
{
    CTC_PTR_VALID_CHECK(api_db);
    return CTC_E_NONE;
}

int32
sys_usw_dmps_shared_set_tx_force_fault(uint8 lchip, sys_dmps_mac_api_db_t* api_db, uint32 fault_bmp)
{
    uint8  mac_grp_idx = 0;
    uint32 tbl_id      = 0;
    uint32 cmd         = 0;
    uint32 index       = 0;
    uint32 value       = 0;
    SharedMii0Cfg_m  mii_per_cfg;

    CTC_PTR_VALID_CHECK(api_db);

    mac_grp_idx = api_db->mac_grp_idx;

    tbl_id = SharedMii0Cfg_t + api_db->mac_idx * (SharedMii1Cfg_t - SharedMii0Cfg_t);
    index  = DRV_INS(mac_grp_idx, 0);
    cmd    = DRV_IOR(tbl_id, DRV_ENTRY_FLAG);
    CTC_ERROR_RETURN(DRV_IOCTL(lchip, index, cmd, &mii_per_cfg));
    DRV_IOR_FIELD(lchip, tbl_id, SharedMii0Cfg_cfgMiiRxPCHLen0_f, &value, &mii_per_cfg);

    if(CTC_FLAG_ISSET(fault_bmp, CTC_PORT_FAULT_FORCE))
    {
        value |= 0x00000002;
    }
    else
    {
        value &= 0xfffffffd;
    }
    DRV_IOW_FIELD(lchip, tbl_id, SharedMii0Cfg_cfgMiiRxPCHLen0_f, &value, &mii_per_cfg);

    cmd = DRV_IOW(tbl_id, DRV_ENTRY_FLAG);
    CTC_ERROR_RETURN(DRV_IOCTL(lchip, index, cmd, &mii_per_cfg));

    return CTC_E_NONE;
}

int32
sys_usw_dmps_shared_set_mii_rst(uint8 lchip, sys_dmps_mac_api_db_t* api_db, uint32 dir, uint32 reset)
{
    uint8  core_id     = 0;
    uint8  mac_grp_idx = 0;
    uint8  fld_num     = 0;
    reg_field_info_t fld_info[1] = {{0}};

    CTC_PTR_VALID_CHECK(api_db);

    core_id     = api_db->core_id;
    mac_grp_idx = api_db->mac_grp_idx;

    fld_num = 0;
    SET_REG_FIELD_INFO(fld_info, fld_num, api_db->mac_idx,
        ((DMPS_RX == dir) ? SharedMiiResetCfg_cfgSoftRstRx0_f : SharedMiiResetCfg_cfgSoftRstTx0_f), (reset ? 1 : 0));
    CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_write_shared_mii_reset_cfg(lchip, core_id, mac_grp_idx, fld_num, fld_info));

    return CTC_E_NONE;
}

int32
sys_usw_dmps_shared_set_pcs_rst(uint8 lchip, sys_dmps_mac_api_db_t* api_db, uint32 dir, uint32 reset)
{
    uint8  core_id     = 0;
    uint8  pcs_grp_idx = 0;
    uint8  fld_num     = 0;
    uint32 value       = reset ? 1 : 0;
    reg_field_info_t fld_info[2] = {{0}};

    CTC_PTR_VALID_CHECK(api_db);

    core_id     = api_db->core_id;
    pcs_grp_idx = api_db->pcs_grp_idx;

    fld_num = 0;
    if ((CTC_CHIP_SERDES_100BASEFX_MODE == api_db->if_mode) || (CTC_CHIP_SERDES_SGMII_MODE == api_db->if_mode)
            || (CTC_CHIP_SERDES_XFI_MODE == api_db->if_mode) || (CTC_CHIP_SERDES_XXVG_MODE == api_db->if_mode)
            || (CTC_CHIP_SERDES_2DOT5G_MODE == api_db->if_mode))
    {
    SET_REG_FIELD_INFO(fld_info, fld_num, api_db->pcs_idx,
        ((DMPS_RX == dir) ? SharedPcsSoftRst_softRstPcsRx0_f : SharedPcsSoftRst_softRstPcsTx0_f), value);
    }
    else if (CTC_CHIP_SERDES_XLG_MODE == api_db->if_mode)
    {
        if (DMPS_RX == dir)
        {
            SET_REG_FIELD_INFO(fld_info, fld_num, api_db->pcs_idx, SharedPcsSoftRst_softRstXlgRx_f,     value);
            SET_REG_FIELD_INFO(fld_info, fld_num, api_db->pcs_idx, SharedPcsSoftRst_rxDeskewSoftRst_f, value);
        }
        else
        {
            SET_REG_FIELD_INFO(fld_info, fld_num, api_db->pcs_idx, SharedPcsSoftRst_softRstXlgTx_f, value);
        }
    }
    else if ((CTC_CHIP_SERDES_LG_MODE == api_db->if_mode) || (CTC_CHIP_SERDES_XLG_R2_MODE == api_db->if_mode))
    {
        if (DMPS_RX == dir)
        {
            if (api_db->pcs_idx < 2)
            {
                SET_REG_FIELD_INFO(fld_info, fld_num, api_db->pcs_idx, SharedPcsSoftRst_softRstXlgRx_f,     value);
                SET_REG_FIELD_INFO(fld_info, fld_num, api_db->pcs_idx, SharedPcsSoftRst_rxDeskewSoftRst_f, value);
            }
            else
            {
                SET_REG_FIELD_INFO(fld_info, fld_num, api_db->pcs_idx, SharedPcsSoftRst_softRstLgRx_f,        value);
                SET_REG_FIELD_INFO(fld_info, fld_num, api_db->pcs_idx, SharedPcsSoftRst_rxDeskewSoftRstLg_f, value);
            }
        }
        else
        {
            if (api_db->pcs_idx < 2)
            {
                SET_REG_FIELD_INFO(fld_info, fld_num, api_db->pcs_idx, SharedPcsSoftRst_softRstXlgTx_f, value);
            }
            else
            {
                SET_REG_FIELD_INFO(fld_info, fld_num, api_db->pcs_idx, SharedPcsSoftRst_softRstLgTx_f, value);
            }
        }
    }
    else if (CTC_CHIP_SERDES_CG_MODE == api_db->if_mode)
    {
        if (DMPS_RX == dir)
        {
            SET_REG_FIELD_INFO(fld_info, fld_num, api_db->pcs_idx, SharedPcsSoftRst_softRstCgRx_f,      value);
            SET_REG_FIELD_INFO(fld_info, fld_num, api_db->pcs_idx, SharedPcsSoftRst_rxDeskewSoftRst_f, value);
        }
        else
        {
            SET_REG_FIELD_INFO(fld_info, fld_num, api_db->pcs_idx, SharedPcsSoftRst_softRstCgTx_f, value);
        }
    }
    CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_write_shared_pcs_soft_rst(lchip, core_id, pcs_grp_idx, fld_num, fld_info));

    return CTC_E_NONE;
}

int32
sys_usw_dmps_shared_set_fec_rst(uint8 lchip, sys_dmps_mac_api_db_t* api_db, uint32 dir, uint32 reset)
{
    CTC_PTR_VALID_CHECK(api_db);

    if ((CTC_CHIP_SERDES_XFI_MODE == api_db->if_mode) || (CTC_CHIP_SERDES_XXVG_MODE == api_db->if_mode) ||
        (CTC_CHIP_SERDES_XLG_MODE == api_db->if_mode) || (CTC_CHIP_SERDES_LG_MODE == api_db->if_mode) ||
        (CTC_CHIP_SERDES_CG_MODE == api_db->if_mode))
    {
        if (CTC_PORT_FEC_TYPE_NONE != api_db->fec_type)
        {
            CTC_ERROR_RETURN(_sys_usw_dmps_shared_set_fec_rst(lchip, api_db, dir, reset));
        }
    }

    return CTC_E_NONE;
}

int32
sys_usw_dmps_shared_set_pkt_en(uint8 lchip, sys_dmps_mac_api_db_t* api_db, uint32 dir, uint32 enable)
{
    uint8  core_id     = 0;
    uint8  mac_grp_idx = 0;
    uint8  fld_num     = 0;
    reg_field_info_t fld_info[1] = {{0}};

    CTC_PTR_VALID_CHECK(api_db);

    core_id     = api_db->core_id;
    mac_grp_idx = api_db->mac_grp_idx;

    if (DMPS_RX == dir)
    {
        SET_REG_FIELD_INFO(fld_info, fld_num, 0, Sgmac0RxCfg_cfgSgmac0RxPktEn_f, (enable ? 1 : 0));
        CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_write_sgmac_rx_cfg(lchip, core_id, mac_grp_idx, api_db->mac_idx, fld_num, fld_info));
    }
    else
    {
        SET_REG_FIELD_INFO(fld_info, fld_num, 0, Sgmac0TxCfg_cfgSgmac0TxPktEn_f, (enable ? 1 : 0));
        CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_write_sgmac_tx_cfg(lchip, core_id, mac_grp_idx, api_db->mac_idx, fld_num, fld_info));
    }

    return CTC_E_NONE;
}

int32
sys_usw_dmps_shared_set_flowctl_ability(uint8 lchip, sys_dmps_mac_api_db_t* api_db, uint32 p_value)
{
    uint8  core_id     = 0;
    uint8  pcs_grp_idx = 0;
    uint8  fld_num     = 0;
    uint32 value       = 0;
    reg_field_info_t fld_info[2] = {{0}};

    CTC_PTR_VALID_CHECK(api_db);

    core_id     = api_db->core_id;
    pcs_grp_idx = api_db->pcs_grp_idx;

    if((CTC_CHIP_SERDES_SGMII_MODE != api_db->if_mode) && (CTC_CHIP_SERDES_2DOT5G_MODE != api_db->if_mode))
    {
        SYS_MAC_DBG_OUT(CTC_DEBUG_LEVEL_ERROR, " Port mode %u is not supported! \n", api_db->if_mode);
        return CTC_E_INVALID_PARAM;
    }
    if(3 < p_value)
    {
        SYS_MAC_DBG_OUT(CTC_DEBUG_LEVEL_ERROR, " Invalid value %u! \n", p_value);
        return CTC_E_INVALID_PARAM;
    }

    switch(p_value)
    {
        case ((!CTC_PORT_PAUSE_ABILITY_TX_EN) & (!CTC_PORT_PAUSE_ABILITY_RX_EN)):
            value = SYS_ASMDIR_0_PAUSE_0;
            break;
        case CTC_PORT_PAUSE_ABILITY_TX_EN:
            value = SYS_ASMDIR_1_PAUSE_0;
            break;
        case CTC_PORT_PAUSE_ABILITY_RX_EN:
            value = SYS_ASMDIR_1_PAUSE_1;
            break;
        case (CTC_PORT_PAUSE_ABILITY_TX_EN | CTC_PORT_PAUSE_ABILITY_RX_EN):
        default:
            value = SYS_ASMDIR_0_PAUSE_1;
            break;
    }

    SET_REG_FIELD_INFO(fld_info, fld_num, 0, SharedPcsSgmii0Cfg_localPauseAbility0_f, value);
    CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_write_shared_pcs_sgmii_cfg(lchip, core_id, pcs_grp_idx, api_db->pcs_idx, fld_num, fld_info));

    return CTC_E_NONE;
}

int32
sys_usw_dmps_shared_set_ipg(uint8 lchip, sys_dmps_mac_api_db_t* api_db, uint32 p_value)
{
    uint8  core_id     = 0;
    uint8  mac_grp_idx = 0;
    uint8  fld_num     = 0;
    reg_field_info_t fld_info[1] = {{0}};

    CTC_PTR_VALID_CHECK(api_db);

    core_id     = api_db->core_id;
    mac_grp_idx = api_db->mac_grp_idx;

    if(CTC_CHIP_SERDES_SGMII_MODE == api_db->if_mode || CTC_CHIP_SERDES_2DOT5G_MODE == api_db->if_mode) 
    {
        if((4 !=p_value) && (8 != p_value) && (12 != p_value))
        {
            SYS_MAC_DBG_OUT(CTC_DEBUG_LEVEL_ERROR, " %% value %d is invalid,only 4 or 8 or 12 is permitted.  \n", p_value);
            return CTC_E_INVALID_PARAM;
        }
    }
    else if(CTC_CHIP_SERDES_XFI_MODE == api_db->if_mode || CTC_CHIP_SERDES_XXVG_MODE == api_db->if_mode ||
            CTC_CHIP_SERDES_XLG_MODE == api_db->if_mode || CTC_CHIP_SERDES_LG_MODE == api_db->if_mode   ||
            CTC_CHIP_SERDES_CG_MODE == api_db->if_mode) 
    {
        if((8 != p_value) && (12 != p_value))
        {
            SYS_MAC_DBG_OUT(CTC_DEBUG_LEVEL_ERROR, " %% value %d is invalid,only 8 or 12 is permitted.  \n", p_value);
            return CTC_E_INVALID_PARAM;
        }
    }

    SET_REG_FIELD_INFO(fld_info, fld_num, 0, SharedMii0Cfg_cfgMiiTxIpgLen0_f, p_value);
    CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_write_sharedmii0cfg(lchip, core_id, mac_grp_idx, api_db->mac_idx, fld_num, fld_info));

    return CTC_E_NONE;
}

int32
sys_usw_dmps_shared_set_preamble(uint8 lchip, sys_dmps_mac_api_db_t* api_db, uint32 p_value)
{
    uint8  core_id     = 0;
    uint8  mac_grp_idx = 0;
    uint8  fld_num     = 0;
    reg_field_info_t fld_info[2] = {{0}};

    CTC_PTR_VALID_CHECK(api_db);

    core_id     = api_db->core_id;
    mac_grp_idx = api_db->mac_grp_idx;

    if(CTC_CHIP_SERDES_SGMII_MODE == api_db->if_mode || CTC_CHIP_SERDES_2DOT5G_MODE == api_db->if_mode)
    {
        if((2 > p_value) || (8 < p_value))
        {
            SYS_MAC_DBG_OUT(CTC_DEBUG_LEVEL_ERROR, " %% value %d is invalid,only 2 to 8 is permitted.  \n", p_value);
            return CTC_E_INVALID_PARAM;
        }
    }
    else if((CTC_CHIP_SERDES_XFI_MODE == api_db->if_mode) || (CTC_CHIP_SERDES_XXVG_MODE == api_db->if_mode))
    {
        if((4 != p_value) && (8 != p_value))
        {
            SYS_MAC_DBG_OUT(CTC_DEBUG_LEVEL_ERROR, " %% value %d is invalid,only 4 or 8 is permitted.  \n", p_value);
            return CTC_E_INVALID_PARAM;
        }
    }
    else
    {
        return ((p_value == 8) ? CTC_E_NONE : CTC_E_NOT_SUPPORT);
    }

    SET_REG_FIELD_INFO(fld_info, fld_num, 0, SharedMii0Cfg_cfgMiiTxPreambleLen0_f, p_value);
    CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_write_sharedmii0cfg(lchip, core_id, mac_grp_idx, api_db->mac_idx, fld_num, fld_info));

    return CTC_E_NONE;
}

int32
sys_usw_dmps_shared_set_padding_en(uint8 lchip, sys_dmps_mac_api_db_t* api_db, uint32 enable)
{
    uint8  core_id     = 0;
    uint8  mac_grp_idx = 0;
    uint8  fld_num     = 0;
    reg_field_info_t fld_info[1] = {{0}};

    CTC_PTR_VALID_CHECK(api_db);

    core_id     = api_db->core_id;
    mac_grp_idx = api_db->mac_grp_idx;

    SET_REG_FIELD_INFO(fld_info, fld_num, 0, Sgmac0TxCfg_cfgSgmac0TxPadEn_f, (enable ? 1 : 0));
    CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_write_sgmac_tx_cfg(lchip, core_id, mac_grp_idx, api_db->mac_idx, fld_num, fld_info));

    return CTC_E_NONE;
}

int32
sys_usw_dmps_shared_set_check_crc_en(uint8 lchip, sys_dmps_mac_api_db_t* api_db, uint32 enable)
{
    uint8  core_id     = 0;
    uint8  mac_grp_idx = 0;
    uint8  fld_num     = 0;
    reg_field_info_t fld_info[1] = {{0}};

    CTC_PTR_VALID_CHECK(api_db);

    core_id     = api_db->core_id;
    mac_grp_idx = api_db->mac_grp_idx;

    SET_REG_FIELD_INFO(fld_info, fld_num, 0, Sgmac0RxCfg_cfgSgmac0RxCrcChkEn_f, (enable ? 1 : 0));
    CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_write_sgmac_rx_cfg(lchip, core_id, mac_grp_idx, api_db->mac_idx, fld_num, fld_info));

    return CTC_E_NONE;
}

int32
sys_usw_dmps_shared_set_strip_crc_en(uint8 lchip, sys_dmps_mac_api_db_t* api_db, uint32 enable)
{
    uint8  core_id     = 0;
    uint8  mac_grp_idx = 0;
    uint8  fld_num     = 0;
    reg_field_info_t fld_info[1] = {{0}};

    CTC_PTR_VALID_CHECK(api_db);

    core_id     = api_db->core_id;
    mac_grp_idx = api_db->mac_grp_idx;

    SET_REG_FIELD_INFO(fld_info, fld_num, 0, Sgmac0TxCfg_cfgSgmac0TxStripCrcEn_f, (enable ? 1 : 0));
    CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_write_sgmac_tx_cfg(lchip, core_id, mac_grp_idx, api_db->mac_idx, fld_num, fld_info));

    return CTC_E_NONE;
}

int32
sys_usw_dmps_shared_set_append_crc_en(uint8 lchip, sys_dmps_mac_api_db_t* api_db, uint32 enable)
{
    uint8  core_id     = 0;
    uint8  mac_grp_idx = 0;
    uint8  fld_num     = 0;
    reg_field_info_t fld_info[1] = {{0}};

    CTC_PTR_VALID_CHECK(api_db);

    core_id     = api_db->core_id;
    mac_grp_idx = api_db->mac_grp_idx;

    SET_REG_FIELD_INFO(fld_info, fld_num, 0, Sgmac0TxCfg_cfgSgmac0TxAppendCrcEn_f, (enable ? 1 : 0));
    CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_write_sgmac_tx_cfg(lchip, core_id, mac_grp_idx, api_db->mac_idx, fld_num, fld_info));

    return CTC_E_NONE;
}

int32
sys_usw_dmps_shared_set_append_tod_en(uint8 lchip, sys_dmps_mac_api_db_t* api_db, uint32 enable)
{
    uint8  core_id     = 0;
    uint8  mac_grp_idx = 0;
    uint8  fld_num     = 0;
    reg_field_info_t fld_info[1] = {{0}};

    CTC_PTR_VALID_CHECK(api_db);

    core_id     = api_db->core_id;
    mac_grp_idx = api_db->mac_grp_idx;

    SET_REG_FIELD_INFO(fld_info, fld_num, 0, Sgmac0RxCfg_cfgSgmac0RxTodAppendEn_f, (enable ? 1 : 0));
    CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_write_sgmac_rx_cfg(lchip, core_id, mac_grp_idx, api_db->mac_idx, fld_num, fld_info));

    return CTC_E_NONE;
}

int32
sys_usw_dmps_shared_set_tailts_en(uint8 lchip, sys_dmps_mac_api_db_t* api_db, uint32 value)
{
    uint8  core_id     = 0;
    uint8  mac_grp_idx = 0;
    uint8  fld_num     = 0;
    uint32 en          = 0;
    uint32 mode        = 0;
    reg_field_info_t fld_info[1] = {{0}};

    CTC_PTR_VALID_CHECK(api_db);

    en   = (value >> 1) & 0x1; //bit 1 en
    mode = value & 0x1;        //bit 0 mode

    if(DRV_IS_TMG(lchip))
    {
        core_id     = api_db->core_id;
        mac_grp_idx = api_db->mac_grp_idx;

        SET_REG_FIELD_INFO(fld_info, fld_num, 0, Sgmac0RxCfg_cfgSgmac0RxTailTsMode_f, (mode ? 1 : 0));
        CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_write_sgmac_rx_cfg(lchip, core_id, mac_grp_idx, api_db->mac_idx, fld_num, fld_info));
        fld_num = 0;
        SET_REG_FIELD_INFO(fld_info, fld_num, 0, Sgmac0TxCfg_cfgSgmac0TxKeepTsEn_f  , (en   ? 1 : 0));
        CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_write_sgmac_tx_cfg(lchip, core_id, mac_grp_idx, api_db->mac_idx, fld_num, fld_info));

        CTC_ERROR_RETURN(sys_usw_dmps_shared_set_append_tod_en(lchip, api_db, en));
    }
    else
    {
        return CTC_E_NOT_SUPPORT;
    }
    
    return CTC_E_NONE;
}

int32
sys_usw_dmps_shared_set_parallel_detect_en(uint8 lchip, sys_dmps_mac_api_db_t* api_db, uint32 enable)
{
    uint8  core_id     = 0;
    uint8  pcs_grp_idx = 0;
    uint8  fld_num     = 0;
    reg_field_info_t fld_info[1] = {{0}};

    CTC_PTR_VALID_CHECK(api_db);

    core_id     = api_db->core_id;
    pcs_grp_idx = api_db->pcs_grp_idx;

    if((CTC_CHIP_SERDES_SGMII_MODE != api_db->if_mode) && (CTC_CHIP_SERDES_2DOT5G_MODE != api_db->if_mode))
    {
        return CTC_E_NOT_SUPPORT;
    }

    SET_REG_FIELD_INFO(fld_info, fld_num, 0, SharedPcsSgmii0Cfg_anParallelDetectEn0_f, (enable ? 1 : 0));
    CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_write_shared_pcs_sgmii_cfg(lchip, core_id, pcs_grp_idx, api_db->pcs_idx, fld_num, fld_info));

    return CTC_E_NONE;
}

int32
sys_usw_dmps_shared_set_sfd_en(uint8 lchip, sys_dmps_mac_api_db_t* api_db, uint32 p_value)
{
    uint8  core_id     = 0;
    uint8  mac_grp_idx = 0;
    uint8  fld_num     = 0;
    reg_field_info_t fld_info[2] = {{0}};

    CTC_PTR_VALID_CHECK(api_db);

    core_id     = api_db->core_id;
    mac_grp_idx = api_db->mac_grp_idx;

    SET_REG_FIELD_INFO(fld_info, fld_num, 0, SharedMii0Cfg_cfgMiiSfdValue0_f, p_value);
    CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_write_sharedmii0cfg(lchip, core_id, mac_grp_idx, api_db->mac_idx, fld_num, fld_info));

    return CTC_E_NONE;
}

int32
sys_usw_dmps_shared_set_tx_pmac_sfd_en(uint8 lchip, sys_dmps_mac_api_db_t* api_db, uint32 p_value)
{
    uint8  core_id     = 0;
    uint8  mac_grp_idx = 0;
    uint8  fld_num     = 0;
    reg_field_info_t fld_info[2] = {{0}};

    CTC_PTR_VALID_CHECK(api_db);

    core_id     = api_db->core_id;
    mac_grp_idx = api_db->mac_grp_idx;

    SET_REG_FIELD_INFO(fld_info, fld_num, 0, SharedMii0Cfg_cfgMiiTxPmacSfdEn0_f, p_value);
    CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_write_sharedmii0cfg(lchip, core_id, mac_grp_idx, api_db->mac_idx, fld_num, fld_info));

    return CTC_E_NONE;
}

int32
sys_usw_dmps_shared_set_rx_pmac_sfd_en(uint8 lchip, sys_dmps_mac_api_db_t* api_db, uint32 p_value)
{
    uint8  core_id     = 0;
    uint8  mac_grp_idx = 0;
    uint8  fld_num     = 0;
    reg_field_info_t fld_info[2] = {{0}};

    CTC_PTR_VALID_CHECK(api_db);

    core_id     = api_db->core_id;
    mac_grp_idx = api_db->mac_grp_idx;

    SET_REG_FIELD_INFO(fld_info, fld_num, 0, SharedMii0Cfg_cfgMiiRxPmacSfdEn0_f, p_value);
    CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_write_sharedmii0cfg(lchip, core_id, mac_grp_idx, api_db->mac_idx, fld_num, fld_info));

    return CTC_E_NONE;
}


int32
sys_usw_dmps_shared_set_force_sigdet(uint8 lchip, sys_dmps_mac_api_db_t* api_db, uint32 sigdet)
{
    uint8  core_id     = 0;
    uint8  pcs_grp_idx = 0;
    uint8  fld_num     = 0;
    reg_field_info_t fld_info[1] = {{0}};

    CTC_PTR_VALID_CHECK(api_db);

    core_id     = api_db->core_id;
    pcs_grp_idx = api_db->pcs_grp_idx;

    SET_REG_FIELD_INFO(fld_info, fld_num, 0, SharedPcsSerdes0Cfg_forceSignalDetect0_f, sigdet);
    CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_write_shared_pcs_serdes_cfg(lchip, core_id, pcs_grp_idx, api_db->pcs_idx, fld_num, fld_info));

    return CTC_E_NONE;
}


#define ___SHARED_GET_API___

int32
sys_usw_dmps_shared_get_cl37_en(uint8 lchip, sys_dmps_mac_api_db_t* api_db, uint32* enable)
{
    uint8  core_id     = 0;
    uint8  pcs_grp_idx = 0;
    reg_field_info_t fld_info[1] = {{0}};

    CTC_PTR_VALID_CHECK(api_db);
    CTC_PTR_VALID_CHECK(enable);

    core_id     = api_db->core_id;
    pcs_grp_idx = api_db->pcs_grp_idx;

    /* SGMII/QSGMII mode auto neg */
    if((CTC_CHIP_SERDES_SGMII_MODE == api_db->if_mode) || (CTC_CHIP_SERDES_2DOT5G_MODE == api_db->if_mode))
    {
        SET_REG_SOURCE_FIELD_INFO(fld_info, 0, SharedPcsSgmii0Cfg_anEnable0_f);
        CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_read_shared_pcs_sgmii_cfg(lchip, core_id, pcs_grp_idx, api_db->pcs_idx, 1, fld_info));
        *enable = fld_info[0].value;
    }

    return CTC_E_NONE;
}

int32
sys_usw_dmps_shared_get_cl37_mode(uint8 lchip, sys_dmps_mac_api_db_t* api_db, uint32* mode)
{
    uint8  core_id     = 0;
    uint8  pcs_grp_idx = 0;
    reg_field_info_t fld_info[1] = {{0}};

    CTC_PTR_VALID_CHECK(api_db);
    CTC_PTR_VALID_CHECK(mode);

    core_id     = api_db->core_id;
    pcs_grp_idx = api_db->pcs_grp_idx;

    /* SGMII/QSGMII mode auto neg */
    if((CTC_CHIP_SERDES_SGMII_MODE == api_db->if_mode) || (CTC_CHIP_SERDES_2DOT5G_MODE == api_db->if_mode))
    {
        SET_REG_SOURCE_FIELD_INFO(fld_info, 0, SharedPcsSgmii0Cfg_anegMode0_f);
        CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_read_shared_pcs_sgmii_cfg(lchip, core_id, pcs_grp_idx, api_db->pcs_idx, 1, fld_info));
        *mode = fld_info[0].value;
    }

    return CTC_E_NONE;
}

int32
sys_usw_dmps_shared_get_loopback(uint8 lchip, sys_dmps_mac_api_db_t* api_db, uint32* enable)
{
    CTC_PTR_VALID_CHECK(api_db);
    CTC_PTR_VALID_CHECK(enable);
 
    return CTC_E_NONE;
}

int32
sys_usw_dmps_shared_get_tx_force_fault(uint8 lchip, sys_dmps_mac_api_db_t* api_db, uint32* enable)
{
    uint8  core_id     = 0;
    uint8  mac_grp_idx = 0;
    reg_field_info_t fld_info[1] = {{0}};

    CTC_PTR_VALID_CHECK(api_db);
    CTC_PTR_VALID_CHECK(enable);

    core_id     = api_db->core_id;
    mac_grp_idx = api_db->mac_grp_idx;

    SET_REG_SOURCE_FIELD_INFO(fld_info, 0, SharedMii0Cfg_cfgMiiRxPCHLen0_f);
    CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_read_sharedmii0cfg(lchip, core_id, mac_grp_idx, api_db->mac_idx, 1, fld_info));
    *enable = CTC_FLAG_ISSET(fld_info[0].value, 0x00000002) ? 1 : 0;
 
    return CTC_E_NONE;
}

int32
sys_usw_dmps_shared_get_link_up(uint8 lchip, sys_dmps_mac_api_db_t* api_db, uint32* p_is_up, uint32 is_phy_link, uint32 mii_link_type)
{
    uint8  type = 0;

    CTC_PTR_VALID_CHECK(api_db);
    CTC_PTR_VALID_CHECK(p_is_up);

    if (is_phy_link && (CTC_CHIP_SERDES_SGMII_MODE != api_db->if_mode) && (CTC_CHIP_SERDES_2DOT5G_MODE != api_db->if_mode))
    {
        SYS_MAC_DBG_OUT(CTC_DEBUG_LEVEL_ERROR, " %% Unsupported PCS mode \n");
        return CTC_E_INVALID_PARAM;
    }

    type = (SYS_MAC_MII_LINK_FM == mii_link_type) ? SYS_PORT_MAC_STATUS_TYPE_LINK :
            ((SYS_MAC_MII_LINK_RAW == mii_link_type) ? SYS_PORT_MAC_STATUS_TYPE_LINK_RAW : SYS_PORT_MAC_STATUS_TYPE_CODE_ERR);

    switch (api_db->if_mode)
    {
        case CTC_CHIP_SERDES_SGMII_MODE:
        case CTC_CHIP_SERDES_2DOT5G_MODE:
            CTC_ERROR_RETURN(_sys_usw_dmps_shared_get_sgmii_link_status(lchip, api_db, type, p_is_up));
            /*if (is_phy_link && auto_neg_en)
            {
                CTC_ERROR_RETURN(_sys_tmm_cpumac_get_cl37_an_remote_status(lchip, gport, auto_neg_mode, 
                                                 NULL, &remote_link));
                if (FALSE == remote_link)
                {
                    *p_is_up = FALSE;
                }
            }*/
            break;
        case CTC_CHIP_SERDES_XXVG_MODE:
        case CTC_CHIP_SERDES_XFI_MODE:
            CTC_ERROR_RETURN(_sys_usw_dmps_shared_get_xfi_xxvg_link_status(lchip, api_db, type, p_is_up));
            break;
        case CTC_CHIP_SERDES_XLG_MODE:
            CTC_ERROR_RETURN(_sys_usw_dmps_shared_get_xlg_link_status(lchip, api_db, type, p_is_up));
            break;
        case CTC_CHIP_SERDES_LG_MODE:
        case CTC_CHIP_SERDES_XLG_R2_MODE:
            CTC_ERROR_RETURN(_sys_usw_dmps_shared_get_lg_link_status(lchip, api_db, type, p_is_up));
            break;
        case CTC_CHIP_SERDES_CG_MODE:
            CTC_ERROR_RETURN(_sys_usw_dmps_shared_get_cg_link_status(lchip, api_db, type, p_is_up));
            break;
        default:
            break;
    }

    return CTC_E_NONE;
}

int32
sys_usw_dmps_shared_get_mii_rst(uint8 lchip, sys_dmps_mac_api_db_t* api_db, uint32 dir, uint32* reset)
{
    uint8  core_id     = 0;
    uint8  mac_grp_idx = 0;
    reg_field_info_t fld_info[1] = {{0}};

    CTC_PTR_VALID_CHECK(api_db);
    CTC_PTR_VALID_CHECK(reset);

    core_id     = api_db->core_id;
    mac_grp_idx = api_db->mac_grp_idx;

    SET_REG_SOURCE_FIELD_INFO(fld_info,  api_db->mac_idx, ((DMPS_RX == dir) ? SharedMiiResetCfg_cfgSoftRstRx0_f : SharedMiiResetCfg_cfgSoftRstTx0_f));
    CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_read_shared_mii_soft_rst(lchip, core_id, mac_grp_idx, 1, fld_info));
    *reset = fld_info[0].value;

    return CTC_E_NONE;
}

int32 sys_usw_dmps_shared_get_code_err(uint8 lchip, sys_dmps_mac_api_db_t* api_db, uint32* p_value)
{
    reg_field_info_t fld_info[1] = {{0}};

    CTC_PTR_VALID_CHECK(api_db);
    CTC_PTR_VALID_CHECK(p_value);

    switch (api_db->if_mode)
    {
        case CTC_CHIP_SERDES_SGMII_MODE:
        case CTC_CHIP_SERDES_2DOT5G_MODE:
            SET_REG_SOURCE_FIELD_INFO(fld_info,     0, SharedPcsSgmii0Status_codeErrCnt0_f);
            CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_read_shared_pcs_sgmii_status(lchip, api_db->core_id, api_db->pcs_grp_idx, api_db->pcs_idx, 1, fld_info));
            *p_value = fld_info[0].value;
            break;
        case CTC_CHIP_SERDES_XXVG_MODE:
        case CTC_CHIP_SERDES_XFI_MODE:
            SET_REG_SOURCE_FIELD_INFO(fld_info,     0, SharedPcsXfi0Status_errBlockCnt0_f);
            CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_read_shared_pcs_xfi_status(lchip, api_db->core_id, api_db->pcs_grp_idx, api_db->pcs_idx, 1, fld_info));
            *p_value = fld_info[0].value;
            break;
        case CTC_CHIP_SERDES_XLG_MODE:
        case CTC_CHIP_SERDES_CG_MODE:
            SET_REG_SOURCE_FIELD_INFO(fld_info,     0, SharedPcsXfi0Status_errBlockCnt0_f);
            CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_read_shared_pcs_xfi_status(lchip, api_db->core_id, 0, api_db->pcs_idx+0, 1, fld_info));
            *p_value = fld_info[0].value;
            CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_read_shared_pcs_xfi_status(lchip, api_db->core_id, 0, api_db->pcs_idx+1, 1, fld_info));
            *(p_value+1) = fld_info[0].value;
            CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_read_shared_pcs_xfi_status(lchip, api_db->core_id, 0, api_db->pcs_idx+2, 1, fld_info));
            *(p_value+2) = fld_info[0].value;
            CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_read_shared_pcs_xfi_status(lchip, api_db->core_id, 0, api_db->pcs_idx+3, 1, fld_info));
            *(p_value+3) = fld_info[0].value;
            break;
        case CTC_CHIP_SERDES_LG_MODE:
            SET_REG_SOURCE_FIELD_INFO(fld_info,     0, SharedPcsXfi0Status_errBlockCnt0_f);
            CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_read_shared_pcs_xfi_status(lchip, api_db->core_id, 0, api_db->pcs_idx, 1, fld_info));
            *p_value = fld_info[0].value;
            CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_read_shared_pcs_xfi_status(lchip, api_db->core_id, 0, api_db->pcs_idx+1, 1, fld_info));
            *(p_value+1) = fld_info[0].value;
            break;
        default:
            break;
    }

    return CTC_E_NONE;
}

int32
sys_usw_dmps_shared_get_pcs_status(uint8 lchip, sys_dmps_mac_api_db_t* api_db, uint32* p_is_up)
{
    CTC_PTR_VALID_CHECK(api_db);
    CTC_PTR_VALID_CHECK(p_is_up);

    switch (api_db->if_mode)
    {
        case CTC_CHIP_SERDES_100BASEFX_MODE:
        case CTC_CHIP_SERDES_SGMII_MODE:
        case CTC_CHIP_SERDES_2DOT5G_MODE:
            CTC_ERROR_RETURN(_sys_usw_dmps_shared_get_sgmii_pcs_link_status(lchip, api_db, p_is_up));
            break;
        case CTC_CHIP_SERDES_XFI_MODE:
        case CTC_CHIP_SERDES_XXVG_MODE:
            CTC_ERROR_RETURN(_sys_usw_dmps_shared_get_xfi_pcs_link_status(lchip, api_db, p_is_up));
            break;
        case CTC_CHIP_SERDES_XLG_MODE:
            CTC_ERROR_RETURN(_sys_usw_dmps_shared_get_xlg_pcs_link_status(lchip, api_db, p_is_up));
            break;
        case CTC_CHIP_SERDES_LG_MODE:
        case CTC_CHIP_SERDES_XLG_R2_MODE:
            CTC_ERROR_RETURN(_sys_usw_dmps_shared_get_lg_pcs_link_status(lchip, api_db, p_is_up));
            break;
        case CTC_CHIP_SERDES_CG_MODE:
            CTC_ERROR_RETURN(_sys_usw_dmps_shared_get_cg_pcs_link_status(lchip, api_db, p_is_up));
            break;
        default:
            break;
    }

    return CTC_E_NONE;
}

int32 sys_usw_dmps_shared_get_fec_cnt(uint8 lchip, sys_dmps_mac_api_db_t* api_db, uint32* uncorr, uint32* corr)
{
    uint8 i = 0;
    reg_field_info_t fld_info[2] = {{0}};

    CTC_PTR_VALID_CHECK(api_db);
    CTC_PTR_VALID_CHECK(uncorr);
    CTC_PTR_VALID_CHECK(corr);

    switch (api_db->fec_type)
    {
        case SYS_DMPS_FEC_TYPE_RS528:
        case SYS_DMPS_FEC_TYPE_RS544:
        case SYS_DMPS_FEC_TYPE_RS272:
            SET_REG_SOURCE_FIELD_INFO(fld_info,     0, RsFec0StatusSharedFec_dbgRsFec0UnCoCwCount_f);
            SET_REG_SOURCE_FIELD_INFO(fld_info + 1, 0, RsFec0StatusSharedFec_dbgRsFec0CorrCwCount_f);
            CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_read_rs_fec_status_shared_fec(lchip, api_db->core_id, api_db->pcs_grp_idx, api_db->pcs_idx, 2, fld_info));
            *uncorr = fld_info[0].value;  /* Uncorrectable Cnt */
            *corr   = fld_info[1].value;  /* Correctable Cnt */
            break;
        case SYS_DMPS_FEC_TYPE_FC2112:
        default:
            SET_REG_SOURCE_FIELD_INFO(fld_info,     0, XgFec0StatusSharedFec_dbgXgFec0UncoBlkCnt_f);
            SET_REG_SOURCE_FIELD_INFO(fld_info + 1, 0, XgFec0StatusSharedFec_dbgXgFec0CorrBlkCnt_f);
            if ((CTC_CHIP_SERDES_XFI_MODE == api_db->if_mode) || (CTC_CHIP_SERDES_XXVG_MODE == api_db->if_mode))  /*0,2,4,6*/
            {
                CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_read_fc2112_fec_count(lchip, api_db->core_id, api_db->pcs_grp_idx, api_db->pcs_idx*2, 2, fld_info));
                *uncorr = fld_info[0].value;  /* Uncorrectable Cnt */
                *corr   = fld_info[1].value;  /* Correctable Cnt */
            }
            else if (CTC_CHIP_SERDES_LG_MODE == api_db->if_mode)  /*0+1+2+3 or 4+5+6+7*/
            {
                for (i = 0; i < 4; i++)
                {
                    CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_read_fc2112_fec_count(lchip, api_db->core_id, api_db->pcs_grp_idx, \
                            ((0 == api_db->pcs_idx)?i:(4+i)), 2, fld_info));
                    *uncorr += fld_info[0].value;  /* Uncorrectable Cnt */
                    *corr   += fld_info[1].value;  /* Correctable Cnt */
                }
            }
            else if (CTC_CHIP_SERDES_XLG_MODE == api_db->if_mode)  /*0+2+4+6*/
            {
                for (i = 0; i < 4; i++)
                {
                    CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_read_fc2112_fec_count(lchip, api_db->core_id, api_db->pcs_grp_idx, i*2, 2, fld_info));
                    *uncorr += fld_info[0].value;  /* Uncorrectable Cnt */
                    *corr   += fld_info[1].value;  /* Correctable Cnt */
                }
            }
            break;
    }

    return CTC_E_NONE;
}

int32
sys_usw_dmps_shared_get_pcs_rst(uint8 lchip, sys_dmps_mac_api_db_t* api_db, uint32 dir, uint32* reset)
{
    uint8  core_id     = 0;
    uint8  pcs_grp_idx = 0;
    reg_field_info_t fld_info[1] = {{0}};

    CTC_PTR_VALID_CHECK(api_db);
    CTC_PTR_VALID_CHECK(reset);

    core_id     = api_db->core_id;
    pcs_grp_idx = api_db->pcs_grp_idx;

    if ((CTC_CHIP_SERDES_SGMII_MODE == api_db->if_mode) || (CTC_CHIP_SERDES_XFI_MODE == api_db->if_mode)
            || (CTC_CHIP_SERDES_XXVG_MODE == api_db->if_mode) || (CTC_CHIP_SERDES_2DOT5G_MODE == api_db->if_mode))
    {
        SET_REG_SOURCE_FIELD_INFO(fld_info, 0, ((DMPS_RX == dir) ? SharedPcsSoftRst_softRstPcsRx0_f : SharedPcsSoftRst_softRstPcsTx0_f));
        CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_read_shared_pcs_soft_rst(lchip, core_id, pcs_grp_idx, 1, fld_info));
        *reset = fld_info[0].value;
    }
    else if (CTC_CHIP_SERDES_XLG_MODE == api_db->if_mode)
    {
        SET_REG_SOURCE_FIELD_INFO(fld_info, 0, ((DMPS_RX == dir) ? SharedPcsSoftRst_softRstXlgRx_f : SharedPcsSoftRst_softRstXlgTx_f));
        CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_read_shared_pcs_soft_rst(lchip, core_id, pcs_grp_idx, 1, fld_info));
        *reset = fld_info[0].value;
    }
    else if ((CTC_CHIP_SERDES_LG_MODE == api_db->if_mode) || (CTC_CHIP_SERDES_XLG_R2_MODE == api_db->if_mode))
    {
        if (0 ==  api_db->pcs_idx)
        {
            SET_REG_SOURCE_FIELD_INFO(fld_info, 0, ((DMPS_RX == dir) ? SharedPcsSoftRst_softRstXlgRx_f : SharedPcsSoftRst_softRstXlgTx_f));
            CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_read_shared_pcs_soft_rst(lchip, core_id, pcs_grp_idx, 1, fld_info));
            *reset = fld_info[0].value;
        }
        else
        {
            SET_REG_SOURCE_FIELD_INFO(fld_info, 0, ((DMPS_RX == dir) ? SharedPcsSoftRst_softRstLgRx_f : SharedPcsSoftRst_softRstLgTx_f));
            CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_read_shared_pcs_soft_rst(lchip, core_id, pcs_grp_idx, 1, fld_info));
            *reset = fld_info[0].value;
        }
    }
    else if (CTC_CHIP_SERDES_CG_MODE == api_db->if_mode)
    {
        SET_REG_SOURCE_FIELD_INFO(fld_info, 0, ((DMPS_RX == dir) ? SharedPcsSoftRst_softRstCgRx_f : SharedPcsSoftRst_softRstCgTx_f));
        CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_read_shared_pcs_soft_rst(lchip, core_id, pcs_grp_idx, 1, fld_info));
        *reset = fld_info[0].value;
    }
 
    return CTC_E_NONE;
}

int32
sys_usw_dmps_shared_get_pkt_en(uint8 lchip, sys_dmps_mac_api_db_t* api_db, uint32 dir, uint32* enable)
{
    uint8  core_id     = 0;
    uint8  mac_grp_idx = 0;
    reg_field_info_t fld_info[1] = {{0}};

    CTC_PTR_VALID_CHECK(api_db);
    CTC_PTR_VALID_CHECK(enable);

    core_id     = api_db->core_id;
    mac_grp_idx = api_db->mac_grp_idx;

    if (DMPS_RX == dir)
    {
        SET_REG_SOURCE_FIELD_INFO(fld_info, 0, Sgmac0RxCfg_cfgSgmac0RxPktEn_f);
        CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_read_sgmac_rx_cfg(lchip, core_id, mac_grp_idx, api_db->mac_idx, 1, fld_info));
    }
    else
    {
        SET_REG_SOURCE_FIELD_INFO(fld_info, 0, Sgmac0TxCfg_cfgSgmac0TxPktEn_f);
        CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_read_sgmac_tx_cfg(lchip, core_id, mac_grp_idx, api_db->mac_idx, 1, fld_info));
    }
    *enable = fld_info[0].value;
 
    return CTC_E_NONE;
}

int32
sys_usw_dmps_shared_get_link_filter(uint8 lchip, sys_dmps_mac_api_db_t* api_db, uint32* en, uint32* value)
{
    uint8  core_id     = 0;
    uint8  mac_grp_idx = 0;
    reg_field_info_t fld_info[2] = {{0}};

    CTC_PTR_VALID_CHECK(api_db);
    CTC_PTR_VALID_CHECK(en);
    CTC_PTR_VALID_CHECK(value);

    core_id     = api_db->core_id;
    mac_grp_idx = api_db->mac_grp_idx;

    SET_REG_SOURCE_FIELD_INFO(fld_info    , 0, SharedMii0Cfg_cfgMiiRxLinkFilterEn0_f);
    SET_REG_SOURCE_FIELD_INFO(fld_info + 1, 0, SharedMii0Cfg_cfgMiiRxLinkFilterTimer0_f);
    CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_read_sharedmii0cfg(lchip, core_id, mac_grp_idx, api_db->mac_idx, 2, fld_info));
    *en    = fld_info[0].value;
    *value = fld_info[1].value;

    return CTC_E_NONE;
}

int32
sys_usw_dmps_shared_get_fault_filter(uint8 lchip, sys_dmps_mac_api_db_t* api_db, uint32* en)
{
    uint8  core_id     = 0;
    uint8  mac_grp_idx = 0;
    reg_field_info_t fld_info[2] = {{0}};

    CTC_PTR_VALID_CHECK(api_db);
    CTC_PTR_VALID_CHECK(en);

    core_id     = api_db->core_id;
    mac_grp_idx = api_db->mac_grp_idx;

    SET_REG_SOURCE_FIELD_INFO(fld_info    , 0, SharedMii0Cfg_cfgMiiRxLinkFaultFilterDisable0_f);
    CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_read_sharedmii0cfg(lchip, core_id, mac_grp_idx, api_db->mac_idx, 1, fld_info));
    *en    = !fld_info[0].value;

    return CTC_E_NONE;
}

int32
sys_usw_dmps_shared_get_link_fault(uint8 lchip, sys_dmps_mac_api_db_t* api_db, uint32* value)
{
    uint8  core_id     = 0;
    uint8  mac_grp_idx = 0;
    reg_field_info_t fld_info[1] = {{0}};

    CTC_PTR_VALID_CHECK(api_db);
    CTC_PTR_VALID_CHECK(value);

    core_id     = api_db->core_id;
    mac_grp_idx = api_db->mac_grp_idx;

    SET_REG_SOURCE_FIELD_INFO(fld_info, 0, SharedMii0Status_dbgMiiRxFaultType0_f);
    CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_read_sharedmii0status(lchip, core_id, mac_grp_idx, api_db->mac_idx, 1, fld_info));
    *value = fld_info[0].value;

    return CTC_E_NONE;
}

int32
sys_usw_dmps_shared_get_ignore_fault(uint8 lchip, sys_dmps_mac_api_db_t* api_db, uint32* enable)
{
    uint8  core_id     = 0;
    uint8  mac_grp_idx = 0;
    reg_field_info_t fld_info[1] = {{0}};

    CTC_PTR_VALID_CHECK(api_db);
    CTC_PTR_VALID_CHECK(enable);

    core_id     = api_db->core_id;
    mac_grp_idx = api_db->mac_grp_idx;

    SET_REG_SOURCE_FIELD_INFO(fld_info, 0, SharedMii0Cfg_cfgMiiIgnoreLocalFault0_f);
    CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_read_sharedmii0cfg(lchip, core_id, mac_grp_idx, api_db->mac_idx, 1, fld_info));
    *enable = (0 == fld_info[0].value) ? FALSE : TRUE;

    return CTC_E_NONE;
}

int32
sys_usw_dmps_shared_get_cl37_flowctl_ability_local(uint8 lchip, sys_dmps_mac_api_db_t* api_db, uint32* p_value)
{
    uint8  core_id     = 0;
    uint8  pcs_grp_idx = 0;
    uint32 val_32      = 0;
    reg_field_info_t fld_info[1] = {{0}};

    CTC_PTR_VALID_CHECK(api_db);
    CTC_PTR_VALID_CHECK(p_value);

    core_id     = api_db->core_id;
    pcs_grp_idx = api_db->pcs_grp_idx;

    /* SGMII/QSGMII mode auto neg */
    if((CTC_CHIP_SERDES_SGMII_MODE == api_db->if_mode) || (CTC_CHIP_SERDES_2DOT5G_MODE == api_db->if_mode))
    {
        SET_REG_SOURCE_FIELD_INFO(fld_info, 0, SharedPcsSgmii0Cfg_localPauseAbility0_f);
        CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_read_shared_pcs_sgmii_cfg(lchip, core_id, pcs_grp_idx, api_db->pcs_idx, 1, fld_info));
        val_32 = fld_info[0].value;

        switch(val_32)
        {
            case SYS_ASMDIR_0_PAUSE_0:
                val_32 = ((!CTC_PORT_PAUSE_ABILITY_TX_EN) & (!CTC_PORT_PAUSE_ABILITY_RX_EN));
                break;
            case SYS_ASMDIR_0_PAUSE_1:
                val_32 = (CTC_PORT_PAUSE_ABILITY_TX_EN | CTC_PORT_PAUSE_ABILITY_RX_EN);
                break;
            case SYS_ASMDIR_1_PAUSE_0:
                val_32 = CTC_PORT_PAUSE_ABILITY_TX_EN;
                break;
            case SYS_ASMDIR_1_PAUSE_1:
            default:
                val_32 = CTC_PORT_PAUSE_ABILITY_RX_EN;
                break;
        }
        *p_value = val_32;
    }

    return CTC_E_NONE;
}

int32 
sys_usw_dmps_shared_get_cl37_remote_status(uint8 lchip, sys_dmps_mac_api_db_t* api_db, uint32 auto_neg_mode, uint32* p_speed, uint32* p_link)
{
    uint8  core_id      = 0;
    uint8  pcs_grp_idx  = 0;
    uint32 tmp_val32    = 0;
    uint32 value        = 0;
    uint32 remote_speed = CTC_PORT_SPEED_1G;
    uint32 remote_link  = 0;

    reg_field_info_t fld_info[1] = {{0}};

    CTC_PTR_VALID_CHECK(api_db);
    CTC_PTR_VALID_CHECK(p_speed);
    CTC_PTR_VALID_CHECK(p_link);

    core_id     = api_db->core_id;
    pcs_grp_idx = api_db->pcs_grp_idx;

    /* SGMII/QSGMII mode auto neg */
    if((CTC_CHIP_SERDES_SGMII_MODE == api_db->if_mode) || (CTC_CHIP_SERDES_2DOT5G_MODE == api_db->if_mode))
    {
        SET_REG_SOURCE_FIELD_INFO(fld_info, 0, SharedPcsSgmii0Status_anRxRemoteCfg0_f);
        CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_read_shared_pcs_sgmii_status(lchip, core_id, pcs_grp_idx, api_db->pcs_idx, 1, fld_info));
        tmp_val32 = fld_info[0].value;
    }

    /*
      get sgmii speed
      bit[11:10] --- 0b'10 --- 1000M
                     0b'01 --- 100M
                     0b'00 --- 10M
      */
    value = (tmp_val32 >> 10) & 0x3;
    if (0x0 == value)
    {
        remote_speed = CTC_PORT_SPEED_10M;
    }
    else if (0x1 == value)
    {
        remote_speed = CTC_PORT_SPEED_100M;
    }
    else
    {
        remote_speed = CTC_PORT_SPEED_1G;
    }
    
    if (CTC_PORT_AUTO_NEG_MODE_1000BASE_X == auto_neg_mode)
    {
        /*
          get 1000BASE-X link status
          bit[13:12] --- 0b'00 --- No error, link OK
                         0b'01 --- Link_Faliure
                         0b'01 --- Offline
                         0b'11 --- Auto-Negotiation_Error
          */
        value = (tmp_val32 >> 12) & 0x3;
        if (value)
        {
            remote_link = FALSE;
        }
        else
        {
            remote_link = TRUE;
        }
    }
    else
    {
        /*
          get SGMII link status
          bit[15] --- 0b'1 --- Link up
                      0b'0 --- Link down
          */
        value = (tmp_val32 >> 15) & 0x1;
        if (value)
        {
            remote_link = TRUE;
        }
        else
        {
            remote_link = FALSE;
        }
    }

    SYS_USW_VALID_PTR_WRITE(p_link , remote_link);
    SYS_USW_VALID_PTR_WRITE(p_speed, remote_speed);
    
    return CTC_E_NONE;
}


int32
sys_usw_dmps_shared_get_cl37_flowctl_ability_remote(uint8 lchip, sys_dmps_mac_api_db_t* api_db, uint32* p_value)
{
    uint8  core_id     = 0;
    uint8  pcs_grp_idx = 0;
    uint32 val_32      = 0;
    uint32 mask        = 0x3;
    reg_field_info_t fld_info[1] = {{0}};

    CTC_PTR_VALID_CHECK(api_db);
    CTC_PTR_VALID_CHECK(p_value);

    core_id     = api_db->core_id;
    pcs_grp_idx = api_db->pcs_grp_idx;

    /* SGMII/QSGMII mode auto neg */
    if((CTC_CHIP_SERDES_SGMII_MODE == api_db->if_mode) || (CTC_CHIP_SERDES_2DOT5G_MODE == api_db->if_mode))
    {
        SET_REG_SOURCE_FIELD_INFO(fld_info, 0, SharedPcsSgmii0Status_anRxRemoteCfg0_f);
        CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_read_shared_pcs_sgmii_status(lchip, core_id, pcs_grp_idx, api_db->pcs_idx, 1, fld_info));
        val_32 = fld_info[0].value;

        /*bit[8:7]*/
        val_32 = (val_32 >> 7) & mask;

        switch(val_32)
        {
            case SYS_ASMDIR_0_PAUSE_0:
                val_32 = ((!CTC_PORT_PAUSE_ABILITY_TX_EN) & (!CTC_PORT_PAUSE_ABILITY_RX_EN));
                break;
            case SYS_ASMDIR_0_PAUSE_1:
                val_32 = (CTC_PORT_PAUSE_ABILITY_TX_EN | CTC_PORT_PAUSE_ABILITY_RX_EN);
                break;
            case SYS_ASMDIR_1_PAUSE_0:
                val_32 = CTC_PORT_PAUSE_ABILITY_TX_EN;
                break;
            case SYS_ASMDIR_1_PAUSE_1:
            default:
                val_32 = CTC_PORT_PAUSE_ABILITY_RX_EN;
                break;
        }
        *p_value = val_32;
    }

    return CTC_E_NONE;
}

int32
sys_usw_dmps_shared_get_ipg(uint8 lchip, sys_dmps_mac_api_db_t* api_db, uint32* p_value)
{
    uint8  core_id     = 0;
    uint8  mac_grp_idx = 0;
    reg_field_info_t fld_info[1] = {{0}};

    CTC_PTR_VALID_CHECK(api_db);
    CTC_PTR_VALID_CHECK(p_value);

    core_id     = api_db->core_id;
    mac_grp_idx = api_db->mac_grp_idx;

    SET_REG_SOURCE_FIELD_INFO(fld_info, 0, SharedMii0Cfg_cfgMiiTxIpgLen0_f);
    CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_read_sharedmii0cfg(lchip, core_id, mac_grp_idx, api_db->mac_idx, 1, fld_info));
    *p_value = fld_info[0].value;
 
    return CTC_E_NONE;
}

int32
sys_usw_dmps_shared_get_preamble(uint8 lchip, sys_dmps_mac_api_db_t* api_db, uint32* p_value)
{
    uint8  core_id     = 0;
    uint8  mac_grp_idx = 0;
    reg_field_info_t fld_info[1] = {{0}};

    CTC_PTR_VALID_CHECK(api_db);
    CTC_PTR_VALID_CHECK(p_value);

    core_id     = api_db->core_id;
    mac_grp_idx = api_db->mac_grp_idx;

    SET_REG_SOURCE_FIELD_INFO(fld_info, 0, SharedMii0Cfg_cfgMiiTxPreambleLen0_f);
    CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_read_sharedmii0cfg(lchip, core_id, mac_grp_idx, api_db->mac_idx, 1, fld_info));
    *p_value = fld_info[0].value;
 
    return CTC_E_NONE;
}

int32
sys_usw_dmps_shared_get_padding_en(uint8 lchip, sys_dmps_mac_api_db_t* api_db, uint32* p_value)
{
    uint8  core_id     = 0;
    uint8  mac_grp_idx = 0;
    reg_field_info_t fld_info[1] = {{0}};

    CTC_PTR_VALID_CHECK(api_db);
    CTC_PTR_VALID_CHECK(p_value);

    core_id     = api_db->core_id;
    mac_grp_idx = api_db->mac_grp_idx;

    SET_REG_SOURCE_FIELD_INFO(fld_info, 0, Sgmac0TxCfg_cfgSgmac0TxPadEn_f);
    CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_read_sgmac_tx_cfg(lchip, core_id, mac_grp_idx, api_db->mac_idx, 1, fld_info));
    *p_value = fld_info[0].value;
 
    return CTC_E_NONE;
}

int32
sys_usw_dmps_shared_get_check_crc_en(uint8 lchip, sys_dmps_mac_api_db_t* api_db, uint32* p_value)
{
    uint8  core_id     = 0;
    uint8  mac_grp_idx = 0;
    reg_field_info_t fld_info[1] = {{0}};

    CTC_PTR_VALID_CHECK(api_db);
    CTC_PTR_VALID_CHECK(p_value);

    core_id     = api_db->core_id;
    mac_grp_idx = api_db->mac_grp_idx;

    SET_REG_SOURCE_FIELD_INFO(fld_info, 0, Sgmac0RxCfg_cfgSgmac0RxCrcChkEn_f);
    CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_read_sgmac_rx_cfg(lchip, core_id, mac_grp_idx, api_db->mac_idx, 1, fld_info));
    *p_value = fld_info[0].value;
 
    return CTC_E_NONE;
}

int32
sys_usw_dmps_shared_get_strip_crc_en(uint8 lchip, sys_dmps_mac_api_db_t* api_db, uint32* p_value)
{
    uint8  core_id     = 0;
    uint8  mac_grp_idx = 0;
    reg_field_info_t fld_info[1] = {{0}};

    CTC_PTR_VALID_CHECK(api_db);
    CTC_PTR_VALID_CHECK(p_value);

    core_id     = api_db->core_id;
    mac_grp_idx = api_db->mac_grp_idx;

    SET_REG_SOURCE_FIELD_INFO(fld_info, 0, Sgmac0TxCfg_cfgSgmac0TxStripCrcEn_f);
    CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_read_sgmac_tx_cfg(lchip, core_id, mac_grp_idx, api_db->mac_idx, 1, fld_info));
    *p_value = fld_info[0].value;
 
    return CTC_E_NONE;
}

int32
sys_usw_dmps_shared_get_append_crc_en(uint8 lchip, sys_dmps_mac_api_db_t* api_db, uint32* p_value)
{
    uint8  core_id     = 0;
    uint8  mac_grp_idx = 0;
    reg_field_info_t fld_info[1] = {{0}};

    CTC_PTR_VALID_CHECK(api_db);
    CTC_PTR_VALID_CHECK(p_value);

    core_id     = api_db->core_id;
    mac_grp_idx = api_db->mac_grp_idx;

    SET_REG_SOURCE_FIELD_INFO(fld_info, 0, Sgmac0TxCfg_cfgSgmac0TxAppendCrcEn_f);
    CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_read_sgmac_tx_cfg(lchip, core_id, mac_grp_idx, api_db->mac_idx, 1, fld_info));
    *p_value = fld_info[0].value;
 
    return CTC_E_NONE;
}

int32
sys_usw_dmps_shared_get_append_tod_en(uint8 lchip, sys_dmps_mac_api_db_t* api_db, uint32* p_value)
{
    uint8  core_id     = 0;
    uint8  mac_grp_idx = 0;
    reg_field_info_t fld_info[1] = {{0}};

    CTC_PTR_VALID_CHECK(api_db);
    CTC_PTR_VALID_CHECK(p_value);

    core_id     = api_db->core_id;
    mac_grp_idx = api_db->mac_grp_idx;

    SET_REG_SOURCE_FIELD_INFO(fld_info, 0, Sgmac0RxCfg_cfgSgmac0RxTodAppendEn_f);
    CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_read_sgmac_rx_cfg(lchip, core_id, mac_grp_idx, api_db->mac_idx, 1, fld_info));
    *p_value = fld_info[0].value;
 
    return CTC_E_NONE;
}

int32
sys_usw_dmps_shared_get_tailts_en(uint8 lchip, sys_dmps_mac_api_db_t* api_db, uint32* p_value)
{
    uint8  core_id     = 0;
    uint8  mac_grp_idx = 0;
    uint32 en          = 0;
    uint32 mode        = 0;
    reg_field_info_t fld_info[1] = {{0}};


    CTC_PTR_VALID_CHECK(api_db);
    CTC_PTR_VALID_CHECK(p_value);

    if(DRV_IS_TMG(lchip))
    {
        core_id     = api_db->core_id;
        mac_grp_idx = api_db->mac_grp_idx;

        SET_REG_SOURCE_FIELD_INFO(fld_info    , 0, Sgmac0RxCfg_cfgSgmac0RxTailTsMode_f);
        CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_read_sgmac_rx_cfg(lchip, core_id, mac_grp_idx, api_db->mac_idx, 1, fld_info));
        mode = fld_info[0].value;

        CTC_ERROR_RETURN(sys_usw_dmps_shared_get_append_tod_en(lchip, api_db, &en));
        *p_value = ((en << 1) | mode);
    }
    else
    {
        *p_value = 0;
    }
    
    return CTC_E_NONE;
}


int32
sys_usw_dmps_shared_get_parallel_detect_en(uint8 lchip, sys_dmps_mac_api_db_t* api_db, uint32* mode)
{
    uint8  core_id     = 0;
    uint8  pcs_grp_idx = 0;
    reg_field_info_t fld_info[1] = {{0}};

    CTC_PTR_VALID_CHECK(api_db);
    CTC_PTR_VALID_CHECK(mode);

    core_id     = api_db->core_id;
    pcs_grp_idx = api_db->pcs_grp_idx;

    if((CTC_CHIP_SERDES_SGMII_MODE == api_db->if_mode) || (CTC_CHIP_SERDES_2DOT5G_MODE == api_db->if_mode))
    {
        SET_REG_SOURCE_FIELD_INFO(fld_info, 0, SharedPcsSgmii0Cfg_anParallelDetectEn0_f);
        CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_read_shared_pcs_sgmii_cfg(lchip, core_id, pcs_grp_idx, api_db->pcs_idx, 1, fld_info));
        *mode = fld_info[0].value;
    }

    return CTC_E_NONE;
}

int32
sys_usw_dmps_shared_get_sfd_en(uint8 lchip, sys_dmps_mac_api_db_t* api_db, uint32* p_value)
{
    uint8  core_id     = 0;
    uint8  mac_grp_idx = 0;
    reg_field_info_t fld_info[1] = {{0}};

    CTC_PTR_VALID_CHECK(api_db);
    CTC_PTR_VALID_CHECK(p_value);

    core_id     = api_db->core_id;
    mac_grp_idx = api_db->mac_grp_idx;

    SET_REG_SOURCE_FIELD_INFO(fld_info, 0, SharedMii0Cfg_cfgMiiSfdValue0_f);
    CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_read_sharedmii0cfg(lchip, core_id, mac_grp_idx, api_db->mac_idx, 1, fld_info));
    *p_value = fld_info[0].value;
 
    return CTC_E_NONE;
}

int32
sys_usw_dmps_shared_get_force_sigdet(uint8 lchip, sys_dmps_mac_api_db_t* api_db, uint32* p_sigdet)
{
    uint8  core_id     = 0;
    uint8  pcs_grp_idx = 0;
    uint8  fld_num     = 0;
    reg_field_info_t fld_info[1] = {{0}};

    CTC_PTR_VALID_CHECK(api_db);
    CTC_PTR_VALID_CHECK(p_sigdet);

    core_id     = api_db->core_id;
    pcs_grp_idx = api_db->pcs_grp_idx;

    SET_REG_SOURCE_FIELD_INFO(fld_info, 0, SharedPcsSerdes0Cfg_forceSignalDetect0_f);
    CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_read_shared_pcs_serdes_cfg(lchip, core_id, pcs_grp_idx, api_db->pcs_idx, fld_num, fld_info));
    *p_sigdet = fld_info[0].value;

    return CTC_E_NONE;
}

int32
sys_usw_dmps_shared_get_rx_pmac_sfd_en(uint8 lchip, sys_dmps_mac_api_db_t* api_db, uint32* p_value)
{
    uint8  core_id     = 0;
    uint8  mac_grp_idx = 0;
    reg_field_info_t fld_info[1] = {{0}};

    CTC_PTR_VALID_CHECK(api_db);
    CTC_PTR_VALID_CHECK(p_value);

    core_id     = api_db->core_id;
    mac_grp_idx = api_db->mac_grp_idx;

    SET_REG_SOURCE_FIELD_INFO(fld_info, 0, SharedMii0Cfg_cfgMiiRxPmacSfdEn0_f);
    CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_read_sharedmii0cfg(lchip, core_id, mac_grp_idx, api_db->mac_idx, 1, fld_info));
    *p_value = fld_info[0].value;
 
    return CTC_E_NONE;
}

int32
sys_usw_dmps_shared_get_tx_pmac_sfd_en(uint8 lchip, sys_dmps_mac_api_db_t* api_db, uint32* p_value)
{
    uint8  core_id     = 0;
    uint8  mac_grp_idx = 0;
    reg_field_info_t fld_info[1] = {{0}};

    CTC_PTR_VALID_CHECK(api_db);
    CTC_PTR_VALID_CHECK(p_value);

    core_id     = api_db->core_id;
    mac_grp_idx = api_db->mac_grp_idx;

    SET_REG_SOURCE_FIELD_INFO(fld_info, 0, SharedMii0Cfg_cfgMiiTxPmacSfdEn0_f);
    CTC_ERROR_RETURN(sys_usw_dmps_shared_reg_read_sharedmii0cfg(lchip, core_id, mac_grp_idx, api_db->mac_idx, 1, fld_info));
    *p_value = fld_info[0].value;
 
    return CTC_E_NONE;
}

int32
sys_usw_dmps_shared_api(uint8 p_api, uint8 lchip, sys_dmps_mac_api_db_t* p_api_db, ...)
{
    uint32  p_value[2] = {0};
    uint32* p_ptr[2]   = {NULL};
    int32 ret = CTC_E_NONE;
    va_list            argptr;

    va_start(argptr, p_api_db);
    switch (p_api)
    {
        case DMPS_MAC_API_SET_MAC_TX_EN:
            ret = sys_usw_dmps_shared_set_mac_tx_en(lchip, p_api_db, va_arg(argptr, uint32));
            break;
        case DMPS_MAC_API_SET_MAC_RX_EN:
            ret = sys_usw_dmps_shared_set_mac_rx_en(lchip, p_api_db, va_arg(argptr, uint32));
            break;
        case DMPS_MAC_API_SET_FEC:
            ret = sys_usw_dmps_shared_set_fec(lchip, p_api_db);
            break;
        case DMPS_MAC_API_SET_MODE:
            ret = sys_usw_dmps_shared_set_mode(lchip, p_api_db, va_arg(argptr, sys_dmps_api_cfg_t*));
            break;
        case DMPS_MAC_API_SET_CL37_EN:
            ret = sys_usw_dmps_shared_set_cl37_en(lchip, p_api_db, va_arg(argptr, uint32));
            break;
        case DMPS_MAC_API_SET_CL37_MODE:
            ret = sys_usw_dmps_shared_set_cl37_mode(lchip, p_api_db, va_arg(argptr, uint32));
            break;
        case DMPS_MAC_API_SET_CL73_EN:
            ret = sys_usw_dmps_shared_set_cl73_en(lchip, p_api_db, va_arg(argptr, uint32));
            break;
        case DMPS_MAC_API_SET_LINK_FILTER:
            p_value[0] = va_arg(argptr, uint32);
            p_value[1] = va_arg(argptr, uint32);
            ret = sys_usw_dmps_shared_set_link_filter(lchip, p_api_db, p_value[0], p_value[1]);
            break;
        case DMPS_MAC_API_SET_FAULT_FILTER:
            p_value[0] = va_arg(argptr, uint32);
            ret = sys_usw_dmps_shared_set_fault_filter(lchip, p_api_db, p_value[0]);
            break;
        case DMPS_MAC_API_SET_IGNORE_FAULT:
            ret = sys_usw_dmps_shared_set_ignore_fault(lchip, p_api_db, va_arg(argptr, uint32));
            break;
        case DMPS_MAC_API_SET_UNDIR_EN:
            ret = sys_usw_dmps_shared_set_unidir_en(lchip, p_api_db, va_arg(argptr, uint32));
            break;
        case DMPS_MAC_API_SET_LOOPBACK:
            ret = sys_usw_dmps_shared_set_loopback(lchip, p_api_db, va_arg(argptr, uint32));
            break;
        case DMPS_MAC_API_SET_TX_FORCE_FAULT:
            ret = sys_usw_dmps_shared_set_tx_force_fault(lchip, p_api_db, va_arg(argptr, uint32));
            break;
        case DMPS_MAC_API_SET_MII_RST:
            p_value[0] = va_arg(argptr, uint32);
            p_value[1] = va_arg(argptr, uint32);
            ret = sys_usw_dmps_shared_set_mii_rst(lchip, p_api_db, p_value[0], p_value[1]);
            break;
        case DMPS_MAC_API_SET_PCS_RST:
            p_value[0] = va_arg(argptr, uint32);
            p_value[1] = va_arg(argptr, uint32);
            ret = sys_usw_dmps_shared_set_pcs_rst(lchip, p_api_db, p_value[0], p_value[1]);
            break;
        case DMPS_MAC_API_SET_FEC_RST:
            p_value[0] = va_arg(argptr, uint32);
            p_value[1] = va_arg(argptr, uint32);
            ret = sys_usw_dmps_shared_set_fec_rst(lchip, p_api_db, p_value[0], p_value[1]);
            break;
        case DMPS_MAC_API_SET_PKT_EN:
            p_value[0] = va_arg(argptr, uint32);
            p_value[1] = va_arg(argptr, uint32);
            ret = sys_usw_dmps_shared_set_pkt_en(lchip, p_api_db, p_value[0], p_value[1]);
            break;
        case DMPS_MAC_API_SET_FLOWCTL_ABILITY:
            ret = sys_usw_dmps_shared_set_flowctl_ability(lchip, p_api_db, va_arg(argptr, uint32));
            break;
        case DMPS_MAC_API_SET_IPG:
            ret = sys_usw_dmps_shared_set_ipg(lchip, p_api_db, va_arg(argptr, uint32));
            break;
        case DMPS_MAC_API_SET_PREAMBLE:
            ret = sys_usw_dmps_shared_set_preamble(lchip, p_api_db, va_arg(argptr, uint32));
            break;
        case DMPS_MAC_API_SET_PADDING_EN:
            ret = sys_usw_dmps_shared_set_padding_en(lchip, p_api_db, va_arg(argptr, uint32));
            break;
        case DMPS_MAC_API_SET_CHECK_CRC_EN:
            ret = sys_usw_dmps_shared_set_check_crc_en(lchip, p_api_db, va_arg(argptr, uint32));
            break;
        case DMPS_MAC_API_SET_STRIP_CRC_EN:
            ret = sys_usw_dmps_shared_set_strip_crc_en(lchip, p_api_db, va_arg(argptr, uint32));
            break;
        case DMPS_MAC_API_SET_APPEND_CRC_EN:
            ret = sys_usw_dmps_shared_set_append_crc_en(lchip, p_api_db, va_arg(argptr, uint32));
            break;
        case DMPS_MAC_API_SET_APPEND_TOD_EN:
            ret = sys_usw_dmps_shared_set_append_tod_en(lchip, p_api_db, va_arg(argptr, uint32));
            break;
        case DMPS_MAC_API_SET_TAILTS_EN:
            ret = sys_usw_dmps_shared_set_tailts_en(lchip, p_api_db, va_arg(argptr, uint32));
            break;
        case DMPS_MAC_API_SET_PARALLEL_DETECT_EN:
            ret = sys_usw_dmps_shared_set_parallel_detect_en(lchip, p_api_db, va_arg(argptr, uint32));
            break;
        case DMPS_MAC_API_SET_SFD_EN:
            ret = sys_usw_dmps_shared_set_sfd_en(lchip, p_api_db, va_arg(argptr, uint32));
            break;
        case DMPS_MAC_API_SET_FAULT_MASK_LINK:
            ret = sys_usw_dmps_shared_set_fault_mask_link(lchip, p_api_db, va_arg(argptr, uint32));
            break;
        case DMPS_MAC_API_SET_FORCE_SIGDET:
            ret = sys_usw_dmps_shared_set_force_sigdet(lchip, p_api_db, va_arg(argptr, uint32));
            break;
        case DMPS_MAC_API_SET_TX_PMAC_SFD_EN:
            ret = sys_usw_dmps_shared_set_tx_pmac_sfd_en(lchip, p_api_db, va_arg(argptr, uint32));
            break;
        case DMPS_MAC_API_SET_RX_PMAC_SFD_EN:
            ret = sys_usw_dmps_shared_set_rx_pmac_sfd_en(lchip, p_api_db, va_arg(argptr, uint32));
            break;
        case DMPS_MAC_API_GET_CL37_EN:
            ret = sys_usw_dmps_shared_get_cl37_en(lchip, p_api_db, va_arg(argptr, uint32*));
            break;
        case DMPS_MAC_API_GET_CL37_MODE:
            ret = sys_usw_dmps_shared_get_cl37_mode(lchip, p_api_db, va_arg(argptr, uint32*));
            break;
        case DMPS_MAC_API_GET_LOOPBACK:
            ret = sys_usw_dmps_shared_get_loopback(lchip, p_api_db, va_arg(argptr, uint32*));
            break;
        case DMPS_MAC_API_GET_TX_FORCE_FAULT:
            ret = sys_usw_dmps_shared_get_tx_force_fault(lchip, p_api_db, va_arg(argptr, uint32*));
            break;
        case DMPS_MAC_API_GET_LINK_UP:
            p_ptr[0]   = va_arg(argptr, uint32*);
            p_value[0] = va_arg(argptr, uint32);
            p_value[1] = va_arg(argptr, uint32);
            ret = sys_usw_dmps_shared_get_link_up(lchip, p_api_db, p_ptr[0], p_value[0], p_value[1]);
            break;
        case DMPS_MAC_API_GET_MII_RST:
            p_value[0] = va_arg(argptr, uint32);
            p_ptr[0]   = va_arg(argptr, uint32*);
            ret = sys_usw_dmps_shared_get_mii_rst(lchip, p_api_db, p_value[0], p_ptr[0]);
            break;
        case DMPS_MAC_API_GET_PCS_STATUS:
            ret = sys_usw_dmps_shared_get_pcs_status(lchip, p_api_db, va_arg(argptr, uint32*));
            break;
        case DMPS_MAC_API_GET_PCS_RST:
            p_value[0] = va_arg(argptr, uint32);
            p_ptr[0]   = va_arg(argptr, uint32*);
            ret = sys_usw_dmps_shared_get_pcs_rst(lchip, p_api_db, p_value[0], p_ptr[0]);
            break;
        case DMPS_MAC_API_GET_PKT_EN:
            p_value[0] = va_arg(argptr, uint32);
            p_ptr[0]   = va_arg(argptr, uint32*);
            ret = sys_usw_dmps_shared_get_pkt_en(lchip, p_api_db, p_value[0], p_ptr[0]);
            break;
        case DMPS_MAC_API_GET_LINK_FILTER:
            p_ptr[0] = va_arg(argptr, uint32*);
            p_ptr[1] = va_arg(argptr, uint32*);
            ret = sys_usw_dmps_shared_get_link_filter(lchip, p_api_db, p_ptr[0], p_ptr[1]);
            break;
        case DMPS_MAC_API_GET_FAULT_FILTER:
            p_ptr[0] = va_arg(argptr, uint32*);
            ret = sys_usw_dmps_shared_get_fault_filter(lchip, p_api_db, p_ptr[0]);
            break;
        case DMPS_MAC_API_GET_LINK_FAULT:
            ret = sys_usw_dmps_shared_get_link_fault(lchip, p_api_db, va_arg(argptr, uint32*));
            break;
        case DMPS_MAC_API_GET_IGNORE_FAULT:
            ret = sys_usw_dmps_shared_get_ignore_fault(lchip, p_api_db, va_arg(argptr, uint32*));
            break;
        case DMPS_MAC_API_GET_CL37_FLOWCTL_ABILITY_LOCAL:
            ret = sys_usw_dmps_shared_get_cl37_flowctl_ability_local(lchip, p_api_db, va_arg(argptr, uint32*));
            break;
        case DMPS_MAC_API_GET_CL37_FLOWCTL_ABILITY_REMOTE:
            ret = sys_usw_dmps_shared_get_cl37_flowctl_ability_remote(lchip, p_api_db, va_arg(argptr, uint32*));
            break;
        case DMPS_MAC_API_GET_CL37_REMOTE_STATUS:
            p_value[0] = va_arg(argptr, uint32);
            p_ptr[0] = va_arg(argptr, uint32*);
            p_ptr[1] = va_arg(argptr, uint32*);
            ret = sys_usw_dmps_shared_get_cl37_remote_status(lchip, p_api_db, p_value[0], p_ptr[0], p_ptr[1]);
            break;
        case DMPS_MAC_API_GET_IPG:
            ret = sys_usw_dmps_shared_get_ipg(lchip, p_api_db, va_arg(argptr, uint32*));
            break;
        case DMPS_MAC_API_GET_PREAMBLE:
            ret = sys_usw_dmps_shared_get_preamble(lchip, p_api_db, va_arg(argptr, uint32*));
            break;
        case DMPS_MAC_API_GET_PADDING_EN:
            ret = sys_usw_dmps_shared_get_padding_en(lchip, p_api_db, va_arg(argptr, uint32*));
            break;
        case DMPS_MAC_API_GET_CHECK_CRC_EN:
            ret = sys_usw_dmps_shared_get_check_crc_en(lchip, p_api_db, va_arg(argptr, uint32*));
            break;
        case DMPS_MAC_API_GET_STRIP_CRC_EN:
            ret = sys_usw_dmps_shared_get_strip_crc_en(lchip, p_api_db, va_arg(argptr, uint32*));
            break;
        case DMPS_MAC_API_GET_APPEND_CRC_EN:
            ret = sys_usw_dmps_shared_get_append_crc_en(lchip, p_api_db, va_arg(argptr, uint32*));
            break;
        case DMPS_MAC_API_GET_APPEND_TOD_EN:
            ret = sys_usw_dmps_shared_get_append_tod_en(lchip, p_api_db, va_arg(argptr, uint32*));
            break;
        case DMPS_MAC_API_GET_TAILTS_EN:
            ret = sys_usw_dmps_shared_get_tailts_en(lchip, p_api_db, va_arg(argptr, uint32*));
            break;
        case DMPS_MAC_API_GET_PARALLEL_DETECT_EN:
            ret = sys_usw_dmps_shared_get_parallel_detect_en(lchip, p_api_db, va_arg(argptr, uint32*));
            break;
        case DMPS_MAC_API_GET_SFD_EN:
            ret = sys_usw_dmps_shared_get_sfd_en(lchip, p_api_db, va_arg(argptr, uint32*));
            break;
        case DMPS_MAC_API_GET_UNDIR_EN:
            ret = sys_usw_dmps_shared_get_unidir_en(lchip, p_api_db, va_arg(argptr, uint32*));
            break;
        case DMPS_MAC_API_GET_FORCE_SIGDET:
            ret = sys_usw_dmps_shared_get_force_sigdet(lchip, p_api_db, va_arg(argptr, uint32*));
            break;
        case DMPS_MAC_API_GET_CODE_ERR:
            ret = sys_usw_dmps_shared_get_code_err(lchip, p_api_db, va_arg(argptr, uint32*));
            break;
        case DMPS_MAC_API_GET_FEC_CNT:
            p_ptr[0] = va_arg(argptr, uint32*);
            p_ptr[1] = va_arg(argptr, uint32*);
            ret = sys_usw_dmps_shared_get_fec_cnt(lchip, p_api_db, p_ptr[0], p_ptr[1]);
            break;
        default:
            break;
    }
    va_end(argptr);

    return ret;
}




